Pedro Echeverría

According to our database1, Pedro Echeverría authored at least 10 papers between 2006 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
High Performance FPGA-oriented Mersenne Twister Uniform Random Number Generator.
J. Signal Process. Syst., 2013

Floating-Point Exponentiation Units for Reconfigurable Computing.
ACM Trans. Reconfigurable Technol. Syst., 2013

2011
Customizing floating-point units for FPGAs: Area-performance-standard trade-offs.
Microprocess. Microsystems, 2011

2009
Exploring performance-power trade-offs for look-up tables in SRAM-based FPGAs.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
Power Considerations in Banked CAMs: A Leakage Reduction Approach.
VLSI Design, 2008

Experimental methodology for power characterization of FPGAs.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Variance reduction techniques for Monte Carlo simulations. A parameterizable FPGA approach.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Designing Highly Parameterized Hardware using xHdl.
Proceedings of the Forum on specification and Design Languages, 2008

An FPGA run-time parameterisable Log-Normal Random Number Generator.
Proceedings of the Reconfigurable Computing: Architectures, 2008

2006
Leakage Energy Reduction in Banked Content Addressable Memories.
Proceedings of the 13th IEEE International Conference on Electronics, 2006


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