Marisa López-Vallejo
Orcid: 0000-0002-3833-524X
According to our database1,
Marisa López-Vallejo
authored at least 83 papers
between 1996 and 2023.
Collaborative distances:
Collaborative distances:
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Online presence:
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on orcid.org
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Bibliography
2023
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023
2022
IEEE Internet Things J., 2022
Reference-free power supply monitor with enhanced robustness against process and temperature variations.
Integr., 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2021
A 65nm Current and Voltage Reference with Improved Line Regulation for Implantable Biosensors.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021
2020
Time-domain writing architecture for multilevel RRAM cells resilient to temperature and process variations.
Integr., 2020
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
Algorithm-Architecture Optimization for Linear and Quadratic Regression on Reconfigurable Platforms.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
2019
A low power RFID based energy harvesting temperature resilient CMOS-only reference voltage.
Integr., 2019
Proceedings of the 29th International Symposium on Power and Timing Modeling, 2019
A 365mV, 13nW CMOS-only energy harvested reference voltage for RFID applications in 40nm technology.
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019
2018
Guest Editorial: Special Section on Fast Fourier Transform (FFT) Hardware Implementations.
J. Signal Process. Syst., 2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges.
IEEE Trans. Very Large Scale Integr. Syst., 2017
Proceedings of the 14th International Conference on Synthesis, 2017
2016
A Performance Study of CUDA UVM versus Manual Optimizations in a Real-World Setup: Application to a Monte Carlo Wave-Particle Event-Based Interaction Model.
IEEE Trans. Parallel Distributed Syst., 2016
SPICE Compact Modeling of Bipolar/Unipolar Memristor Switching Governed by Electrical Thresholds.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Reliable design methodology: The combined effect of radiation, variability and temperature.
Proceedings of the 13th International Conference on Synthesis, 2016
A temperature-independent PUF with a configurable duty cycle of CMOS ring oscillators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
IEEE Trans. Instrum. Meas., 2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
IEEE Trans. Aerosp. Electron. Syst., 2015
Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015
2014
Sensors, 2014
2013
J. Signal Process. Syst., 2013
ACM Trans. Reconfigurable Technol. Syst., 2013
A low power 6t-SRAM using negative bit-line for variability tolerance beyond 22nm node.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
2012
Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Proceedings of the 17th IEEE International Conference on Engineering of Complex Computer Systems, 2012
2011
Microprocess. Microsystems, 2011
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Real time FPGA implementation of an automatic modulation classifier for electronic warfare applications.
Proceedings of the 19th European Signal Processing Conference, 2011
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
2010
2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
Proceedings of the Embedded Systems Design and Verification, 2009
2008
Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures.
Integr., 2008
A hardware mechanism to reduce the energy consumption of the register file of in-order architectures.
Int. J. Embed. Syst., 2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
Variance reduction techniques for Monte Carlo simulations. A parameterizable FPGA approach.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
A Web-Based Environment Providing Remote Access To FPGA Platforms For Teaching Digital Hardware Design.
Proceedings of the IADIS International Conference e-Learning 2008, 2008
Proceedings of the Forum on specification and Design Languages, 2008
Proceedings of the Reconfigurable Computing: Architectures, 2008
2007
Int. J. Embed. Syst., 2007
Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the Embedded Software and Systems, [Third] International Conference, 2007
Proceedings of the Power-aware Computing Systems, 21.01. - 26.01.2007, 2007
2006
Proceedings of the International Symposium on Industrial Embedded Systems, 2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Analysis of the Thermal Impact of Source-Code Transformations in Embedded-Processors.
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Automated design space exploration of FPGA-based FFT architectures based on area and power estimation.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006
2005
Proceedings of the Embedded Systems Handbook., 2005
J. Embed. Comput., 2005
Proceedings of the Power-aware Computing Systems, 3.-8. April 2005, 2005
2004
Proceedings of the Forum on specification and Design Languages, 2004
2003
On the hardware-software partitioning problem: System modeling and partitioning techniques.
ACM Trans. Design Autom. Electr. Syst., 2003
Int. J. Parallel Program., 2003
Proceedings of the Integrated Circuit and System Design, 2003
An Efficient Hash Table Based Approach to Avoid State Space Explosion in History Driven Quasi-Static Scheduling.
Proceedings of the 2003 Design, 2003
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003
Proceedings of the Embedded Software for SoC, 2003
2002
Proceedings of the 55th IEEE Vehicular Technology Conference, 2002
2001
ED68K. A design framework for the development of digital systems based on MC68000.
Proceedings of the Computers and Education. Towards an Interconnected Society, 2001
2000
1999
1998
Proceedings of the Methodology and Tools in Knowledge-Based Systems, 1998
Proceedings of the 1998 Design, 1998
1996
Proceedings of the Forth International Workshop on Hardware/Software Codesign, 1996