Peter Pessl

According to our database1, Peter Pessl authored at least 20 papers between 2003 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Correction Fault Attacks on Randomized CRYSTALS-Dilithium.
IACR Cryptol. ePrint Arch., 2024

2023
Belief Propagation Meets Lattice Reduction: Security Estimates for Error-Tolerant Key Recovery from Decryption Errors.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023

2022
Higher-Order Masked Ciphertext Comparison for Lattice-Based Cryptography.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

2021
Fault Attacks on CCA-secure Lattice KEMs.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

Fault-enabled chosen-ciphertext attacks on Kyber.
IACR Cryptol. ePrint Arch., 2021

2020
Single-Trace Attacks on Keccak.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

2019
More Practical Single-Trace Attacks on the Number Theoretic Transform.
IACR Cryptol. ePrint Arch., 2019

2018
Differential Fault Attacks on Deterministic Lattice Signatures.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

2017
Single-Trace Side-Channel Attacks on Masked Lattice-Based Encryption.
IACR Cryptol. ePrint Arch., 2017

To BLISS-B or not to be - Attacking strongSwan's Implementation of Post-Quantum Signatures.
IACR Cryptol. ePrint Arch., 2017

Analyzing the Shuffling Side-Channel Countermeasure for Lattice-Based Signatures.
IACR Cryptol. ePrint Arch., 2017

2016
DRAMA: Exploiting DRAM Addressing for Cross-CPU Attacks.
Proceedings of the 25th USENIX Security Symposium, 2016

Enhancing Side-Channel Analysis of Binary-Field Multiplication with Bit Reliability.
Proceedings of the Topics in Cryptology - CT-RSA 2016 - The Cryptographers' Track at the RSA Conference 2016, San Francisco, CA, USA, February 29, 2016

2015
Reverse Engineering Intel DRAM Addressing and Exploitation.
CoRR, 2015

2014
Curved Tags - A Low-Resource ECDSA Implementation Tailored for RFID.
Proceedings of the Radio Frequency Identification: Security and Privacy Issues, 2014

2013
Pushing the Limits of SHA-3 Hardware Implementations to Fit on RFID.
IACR Cryptol. ePrint Arch., 2013

2006
System-in-Package und Class-D-Linetreibertechnologie - die Schlüssel zur erfolgreichen Optimierung von ADSL2+ Datenübertragungseinrichtungen.
Elektrotech. Informationstechnik, 2006

2004
A four-channel ADSL2+ analog front-end for CO applications with 75 mW per channel, built in 0.13-μm CMOS.
IEEE J. Solid State Circuits, 2004

Low-power 14-bit current steering DAC, for ADSL2+/CO applications in 0.13μm CMOS.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003
A 85-dB dynamic range multibit delta-sigma ADC for ADSL-CO applications in 0.18-μm CMOS.
IEEE J. Solid State Circuits, 2003


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