Yuval Yarom

Peter Schwabe

Basavesh Ammanaghatta Shivakumar

IACR Cryptol. ePrint Arch., 2022

Spectre Declassified: Reading from the Right Place at the Wrong Time.

[BibT_eX]

[DOI]

Jack Barnes

Gilles Barthe

Sunjay Cauligi

IACR Cryptol. ePrint Arch., 2022

CryptOpt: Verified Compilation with Random Program Search for Cryptographic Primitives.

[BibT_eX]

[DOI]

Markus Wagner

CoRR, 2022

The Impostor Among US(B): Off-Path Injection Attacks on USB Communications.

[BibT_eX]

[DOI]

CoRR, 2022

CacheFX: A Framework for Evaluating Cache Security.

[BibT_eX]

[DOI]

CoRR, 2022

DRAWNAPART: A Device Identification Technique based on Remote GPU Fingerprinting.

[BibT_eX]

[DOI]

CoRR, 2022

Spook.js: Attacking Chrome Strict Site Isolation via Speculative Execution.

[BibT_eX]

[DOI]

Proceedings of the 43rd IEEE Symposium on Security and Privacy, 2022

DRAWN APART: A Device Identification Technique based on Remote GPU Fingerprinting.

[BibT_eX]

[DOI]

Proceedings of the 29th Annual Network and Distributed System Security Symposium, 2022

Opportunities for genetic improvement of cryptographic code.

[BibT_eX]

[DOI]

Markus Wagner

Proceedings of the GECCO '22: Genetic and Evolutionary Computation Conference, Companion Volume, Boston, Massachusetts, USA, July 9, 2022

Side-Channeling the Kalyna Key Expansion.

[BibT_eX]

[DOI]

Zhiyuan Zhang

Proceedings of the Topics in Cryptology - CT-RSA 2022, 2022

Automating Cryptographic Code Generation.

[BibT_eX]

[DOI]

Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security, 2022

HammerScope: Observing DRAM Power Consumption Using Rowhammer.

[BibT_eX]

[DOI]

Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022

2021

Browser Based Side-Channel Defenses Datasets.

[BibT_eX]

[DOI]

Dataset, October, 2021

Website Fingerprinting Through the Cache Occupancy Channel and its Real World Practicality.

[BibT_eX]

[DOI]

IEEE Trans. Dependable Secur. Comput., 2021

Whack-a-Meltdown: Microarchitectural Security Games [Systems Attacks and Defenses].

[BibT_eX]

[DOI]

IEEE Secur. Priv., 2021

Rosita++: Automatic Higher-Order Leakage Elimination from Cryptographic Code.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2021

RSA Key Recovery from Digit Equivalence Information.

[BibT_eX]

[DOI]

Andrew Feutrill

Rui Qi Sim

IACR Cryptol. ePrint Arch., 2021

Row, Row, Row Your Boat: How to Not Find Weak Keys in Pilsung.

[BibT_eX]

[DOI]

Eyal Ronen

Gregory G. Rose

IACR Cryptol. ePrint Arch., 2021

SoK: Design Tools for Side-Channel-Aware Implementations.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2021

SoK: Design Tools for Side-Channel-Aware Implementions.

[BibT_eX]

[DOI]

CoRR, 2021

Prime+Probe 1, JavaScript 0: Overcoming Browser-based Side-Channel Defenses.

[BibT_eX]

[DOI]

Proceedings of the 30th USENIX Security Symposium, 2021

CacheOut: Leaking Data on Intel CPUs via Cache Evictions.

[BibT_eX]

[DOI]

Proceedings of the 42nd IEEE Symposium on Security and Privacy, 2021

Nonce@Once: A Single-Trace EM Side Channel Attack on Several Constant-Time Elliptic Curve Implementations in Mobile Platforms.

[BibT_eX]

[DOI]

Proceedings of the IEEE European Symposium on Security and Privacy, 2021

2020

Cache vs. Key-Dependency: Side Channeling an Implementation of Pilsung.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

LadderLeak: Breaking ECDSA With Less Than One Bit Of Nonce Leakage.

[BibT_eX]

[DOI]

Diego F. Aranha

Felipe Rodrigues Novaes

Akira Takahashi

Mehdi Tibouchi

IACR Cryptol. ePrint Arch., 2020

Meltdown: reading kernel memory from user space.

[BibT_eX]

[DOI]

Commun. ACM, 2020

Spectre attacks: exploiting speculative execution.

[BibT_eX]

[DOI]

Commun. ACM, 2020

A Queueing Solution to Reduce Delay in Processing of Disclosed Vulnerabilities.

[BibT_eX]

[DOI]

Proceedings of the Second IEEE International Conference on Trust, 2020

RAMBleed: Reading Bits in Memory Without Accessing Them.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE Symposium on Security and Privacy, 2020

LVI: Hijacking Transient Execution through Microarchitectural Load Value Injection.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE Symposium on Security and Privacy, 2020

PThammer: Cross-User-Kernel-Boundary Rowhammer through Implicit Accesses.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Enterprise Security Architecture: Mythology or Methodology?

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Enterprise Information Systems, 2020

Security Architecture Framework for Enterprises.

[BibT_eX]

[DOI]

Proceedings of the Enterprise Information Systems - 22nd International Conference, 2020

2019

Website Fingerprinting - Last Level Cache Contention Traces.

[BibT_eX]

[DOI]

Dataset, September, 2019

Breaking Virtual Memory Protection and the SGX Ecosystem with Foreshadow.

[BibT_eX]

[DOI]

IEEE Micro, 2019

Rosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

Pseudorandom Black Swans: Cache Attacks on CTR_DRBG.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2019

Fallout: Reading Kernel Writes From User Space.

[BibT_eX]

[DOI]

CoRR, 2019

Robust Website Fingerprinting Through the Cache Occupancy Channel.

[BibT_eX]

[DOI]

Proceedings of the 28th USENIX Security Symposium, 2019

Time Protection: The Missing OS Abstraction.

[BibT_eX]

[DOI]

Proceedings of the Fourteenth EuroSys Conference 2019, Dresden, Germany, March 25-28, 2019, 2019

Fallout: Leaking Data on Meltdown-resistant CPUs.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security, 2019

2018

Spectre Attacks: Exploiting Speculative Execution.

[BibT_eX]

[DOI]

meltdownattack.com, 2018

Meltdown

[BibT_eX]

[DOI]

meltdownattack.com, 2018

CacheQuote: Efficiently Recovering Long-term Secrets of SGX EPID via Cache Attacks.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

A survey of microarchitectural timing attacks and countermeasures on contemporary hardware.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2018

The 9 Lives of Bleichenbacher's CAT: New Cache ATtacks on TLS Implementations.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2018

Drive-by Key-Extraction Cache Attacks from Portable Code.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2018

Meltdown: Reading Kernel Memory from User Space.

[BibT_eX]

[DOI]

Proceedings of the 27th USENIX Security Symposium, 2018

Foreshadow: Extracting the Keys to the Intel SGX Kingdom with Transient Out-of-Order Execution.

[BibT_eX]

[DOI]

Proceedings of the 27th USENIX Security Symposium, 2018

Another Flip in the Wall of Rowhammer Defenses.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Symposium on Security and Privacy, 2018

The Effect of Common Vulnerability Scoring System Metrics on Vulnerability Exploit Delay.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Symposium on Computing and Networking, 2018

No Security Without Time Protection: We Need a New Hardware-Software Contract.

[BibT_eX]

[DOI]

Qian Ge

Gernot Heiser

Proceedings of the 9th Asia-Pacific Workshop on Systems, 2018

2017

CacheBleed: a timing attack on OpenSSL constant-time RSA.

[BibT_eX]

[DOI]

Nadia Heninger

J. Cryptogr. Eng., 2017

To BLISS-B or not to be - Attacking strongSwan's Implementation of Post-Quantum Signatures.

[BibT_eX]

[DOI]

Peter Pessl

Leon Groot Bruinderink

IACR Cryptol. ePrint Arch., 2017

Modifying an Enciphering Scheme after Deployment.

[BibT_eX]

[DOI]

Paul Grubbs

Thomas Ristenpart

IACR Cryptol. ePrint Arch., 2017

May the Fourth Be With You: A Microarchitectural Side Channel Attack on Several Real-World Applications of Curve25519.

[BibT_eX]

[DOI]

Luke Valenta

IACR Cryptol. ePrint Arch., 2017

Sliding right into disaster: Left-to-right sliding windows leak.

[BibT_eX]

[DOI]

Daniel J. Bernstein

Joachim Breitner

Leon Groot Bruinderink

Nadia Heninger

Tanja Lange

Christine van Vredendaal

IACR Cryptol. ePrint Arch., 2017

USB Snooping Made Easy: Crosstalk Leakage Attacks on USB Hubs.

[BibT_eX]

[DOI]

Yang Su

Damith Chinthana Ranasinghe

Proceedings of the 26th USENIX Security Symposium, 2017

2016

ECDSA Key Extraction from Mobile Devices via Nonintrusive Physical Side Channels.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2016

"Make Sure DSA Signing Exponentiations Really are Constant-Time".

[BibT_eX]

[DOI]

Cesar Pereida García

Billy Bob Brumley

IACR Cryptol. ePrint Arch., 2016

Flush, Gauss, and Reload - A Cache Attack on the BLISS Lattice-Based Signature Scheme.

[BibT_eX]

[DOI]

Leon Groot Bruinderink

Andreas Hülsing

Tanja Lange

IACR Cryptol. ePrint Arch., 2016

Do Hardware Cache Flushing Operations Actually Meet Our Expectations?

[BibT_eX]

[DOI]

Qian Ge

Gernot Heiser

CoRR, 2016

CATalyst: Defeating last-level cache side channel attacks in cloud computing.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015

Evaluation and Cryptanalysis of the Pandaka Lightweight Cipher.

[BibT_eX]

[DOI]

Damith Chinthana Ranasinghe

Gefei Li

IACR Cryptol. ePrint Arch., 2015

Mapping the Intel Last-Level Cache.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2015

Exploiting Transformations of the Galois Configuration to Improve Guess-and-Determine Attacks on NFSRs.

[BibT_eX]

[DOI]

Gefei Li

Damith Chinthana Ranasinghe

IACR Cryptol. ePrint Arch., 2015

Amplifying Side Channels Through Performance Degradation.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2015

Last-Level Cache Side-Channel Attacks are Practical.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE Symposium on Security and Privacy, 2015

2014

Recovering OpenSSL ECDSA Nonces Using the FLUSH+RELOAD Cache Side-channel Attack.

[BibT_eX]

[DOI]

Naomi Benger

IACR Cryptol. ePrint Arch., 2014

Just a Little Bit More.

[BibT_eX]

[DOI]

Joop van de Pol

Nigel P. Smart

IACR Cryptol. ePrint Arch., 2014

"Ooh Aah... Just a Little Bit" : A small amount of side channel can go a long way.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2014

2013

Flush+Reload: a High Resolution, Low Noise, L3 Cache Side-Channel Attack.

[BibT_eX]

[DOI]

Katrina E. Falkner

IACR Cryptol. ePrint Arch., 2013

2012

S-RVM: a secure design for a high-performance java virtual machine.

[BibT_eX]

[DOI]