Pietro Monsurrò

According to our database1, Pietro Monsurrò authored at least 54 papers between 2005 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Low-power class-AB 4th-order low-pass filter based on current conveyors with dynamic mismatch compensation of biasing errors.
Int. J. Circuit Theory Appl., 2020

0.6-V CMOS cascode OTA with complementary gate-driven gain-boosting and forward body bias.
Int. J. Circuit Theory Appl., 2020

High-speed AWG exploiting parallel time interleaved DAC cores.
Proceedings of the 2020 IEEE International Instrumentation and Measurement Technology Conference, 2020

2019
High-gain, high-CMRR class AB operational transconductance amplifier based on the flipped voltage follower.
Int. J. Circuit Theory Appl., 2019

Area-Efficient Low-Power Bandpass Gm-C Filter for Epileptic Seizure Detection in 130nm CMOS.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

A low-power class-AB Gm-C biquad stage in CMOS 40nm technology.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks.
IEEE Trans. Very Large Scale Integr. Syst., 2018

New Models for the Calibration of Four-Channel Time-Interleaved ADCs Using Filter Banks.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Topology of Fully Differential Class-AB Symmetrical OTA With Improved CMRR.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017
Univariate Power Analysis Attacks Exploiting Static Dissipation of Nanometer CMOS VLSI Circuits for Cryptographic Applications.
IEEE Trans. Emerg. Top. Comput., 2017

Calibration of Time-Interleaved ADCs via Hermitianity-Preserving Taylor Approximations.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Faster, Stabler, and Simpler - A Recursive-Least-Squares Algorithm Exploiting the Frisch-Waugh-Lovell Theorem.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Fully Differential Class-AB OTA with Improved CMRR.
J. Circuits Syst. Comput., 2017

Multi-rate signal processing based model for high-speed digitizers.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2017

Perfect reconstruction filters for 4-channels time-interleaved ADC affected by mismatches.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

The recursive batch least squares filter: An efficient RLS filter for floating-point hardware.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

On the use of voltage conveyors for the synthesis of biquad filters and arbitrary networks.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

Class-AB current conveyors based on the FVF.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

A fully-differential class-AB OTA with CMRR improved by local feedback.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

VHDL implementation of FWL RLS algorithm.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

Power-efficient dynamic-biased CCII.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

2016
Comparative performance analysis and complementary triode based CMFB circuits for fully differential class AB symmetrical OTAs with low power consumption.
Int. J. Circuit Theory Appl., 2016

Synthesis of anti-aliasing filters for IF receivers.
Proceedings of the 2016 MIXDES, 2016

A new class-AB Flipped Voltage Follower using a common-gate auxiliary amplifier.
Proceedings of the 2016 MIXDES, 2016

2015
Subsampling Models of Bandwidth Mismatch for Time-Interleaved Converter Calibration.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

High-tuning-range CMOS band-pass IF filter based on a low-<i>Q</i> cascaded biquad optimization technique.
Int. J. Circuit Theory Appl., 2015

2014
88-µ A 1-MHz Stray-Insensitive CMOS Current-Mode Interface IC for Differential Capacitive Sensors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Architecture and modeling of a novel optical beamforming network suitable for microwave photonics implementation.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

Implementing radar algorithms on CUDA hardware.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

2013
Improved Digital Background Calibration of Time-Interleaved Pipeline A/D Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Effect of components relative tolerance in the magnitude response of a Gm-C biquad.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012
Efficient Digital Background Calibration of Time-Interleaved Pipeline Analog-to-Digital Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
Design strategy for biquad-based continuous-time low-pass filters.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

A class-AB very low voltage amplifier and sample & hold circuit.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

A class-AB flipped voltage follower output stage.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

An MDAC architecture with low sensitivity to finite opamp gain.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

A very low-voltage differential amplifier for opamp design.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010
Behavioral Modeling for Calibration of Pipeline Analog-To-Digital Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009
Analysis and Implementation of a Minimum-Supply Body-Biased CMOS Differential Amplifier Cell.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Design Solutions for Sample-and-Hold Circuits in CMOS Nanometer Technologies.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

0.9-V CMOS cascode amplifier with body-driven gain boosting.
Int. J. Circuit Theory Appl., 2009

2008
Unity-Gain Amplifier With Theoretically Zero Gain Error.
IEEE Trans. Instrum. Meas., 2008

A Simple Technique for Fast Digital Background Calibration of A/D Converters.
EURASIP J. Adv. Signal Process., 2008

A gain-enhancing technique for very low-voltage amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Linearization Technique for Source-Degenerated CMOS Differential Transconductors.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

Source-degenerated CMOS Transconductor with Auxiliary Linearization.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A distortion model for pipeline Analog-to-Digital converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Very Low Voltage CMOS Two-stage Amplifier.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Sub-1V CMOS OTA with Body-driven Gain Boosting.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Power-constrained Bandwidth Optimization in Cascaded Open-loop Amplifiers.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
Inverting closed-loop amplifier architecture with reduced gain error and high input impedance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A model for the distortion due to switch on-resistance in sample-and-hold circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
High-speed CMOS-to-ECL pad driver in 0.18µm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Switched-capacitor body-biasing technique for very low voltage CMOS amplifiers.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005


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