Pramod P. Udupa

Orcid: 0000-0003-4943-3643

According to our database1, Pramod P. Udupa authored at least 7 papers between 2010 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2020
WinDConv: A Fused Datapath CNN Accelerator for Power-Efficient Edge Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

IKW: Inter-Kernel Weights for Power Efficient Edge Computing.
IEEE Access, 2020

Accelerating Depthwise Convolution and Pooling Operations on z-First Storage CNN Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2013
A Novel Hierarchical Low Complexity Synchronization Method for OFDM Systems.
Proceedings of the 77th IEEE Vehicular Technology Conference, 2013

A block-parallel architecture for initial and fine synchronization in OFDM systems.
Proceedings of IEEE International Conference on Communications, 2013

2010
A hardware accelerated system for deep packet inspection.
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010


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