Sehwan Lee
Orcid: 0000-0001-5504-974X
According to our database1,
Sehwan Lee
authored at least 23 papers
between 2007 and 2024.
Collaborative distances:
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Bibliography
2024
33.11 A Hybrid Recording System with 10kHz-BW 630mVPP 84.6dB-SNDR 173.3dB-FOMSNDR and 5kHz-BW 114dB-DR for Simultaneous ExG and Biocurrent Acquisition.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A 1V 136.6dB-DR 4kHz-BW $\Delta\Sigma$ Current-to-Digital Converter with a Truncation-Noise-Shaped Baseline-Servo-Loop in 0.18\mu\mathrm{m}$ CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A 1V-Supply $1.85\mathrm{V}_{\text{PP}}$ -Input-Range 1kHz-BW 181.9dB-FOMDR179.4dB-FOMSNDR 2<sup>nd</sup>-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
A 2.54μJ∙ppm<sup>2</sup>-FOMS Supply- and Temperature-Independent Time-Locked ΔΣ Capacitance-to-Digital Converter in 0.18-μm CMOS.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 0.7V 17fJ/Step-FOMW 178.1dB-FOMSNDR 10kHz-BW 560mVPP True-ExG Biopotential Acquisition System with Parasitic-Insensitive 421MΩ Input Impedance in 0.18μm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
9.5 A 6K-MAC Feature-Map-Sparsity-Aware Neural Processing Unit in 5nm Flagship Mobile SoC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
A Multi-Mode ULP Receiver Based on an Injection-Locked Oscillator for IoT Applications.
IEEE Access, 2020
Accelerating Depthwise Convolution and Pooling Operations on z-First Storage CNN Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
An 11.5TOPS/W 1024-MAC Butterfly Structure Dual-Core Sparsity-Aware Neural Processing Unit in 8nm Flagship Mobile SoC.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
A 110dB-CMRR 100dB-PSRR multi-channel neural-recording amplifier system using differentially regulated rejection ratio enhancement in 0.18μm CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the International SoC Design Conference, 2018
2017
Does Spatial Attribute between 2D and 3D Virtual Spaces make Different User Immersion of Audio-Visual Events?
Proceedings of the 9th International Conference on Computer and Automation Engineering, 2017
2011
Proceedings of the 2011 ACM Symposium on Applied Computing (SAC), TaiChung, Taiwan, March 21, 2011
A Demand-Based FTL Scheme Using Dualistic Approach on Data Blocks and Translation Blocks.
Proceedings of the 17th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2011
2010
Unifying Buffer Replacement and Prefetching with Data Migration for Heterogeneous Storage Devices.
Proceedings of the 16th IEEE International Conference on Parallel and Distributed Systems, 2010
2009
Proceedings of the Selected Papers of the 2009 International Conference on Computational Science and Its Applications, 2009
2008
Proceedings of the Fourteenth IEEE Internationl Conference on Embedded and Real-Time Computing Systems and Applications, 2008
Proceedings of the Selected Papers of the Sixth International Conference on Computational Sciences and Its Applications, 2008
2007
Memory-Efficient Compressed Filesystem Architecture for NAND Flash-Based Embedded Systems.
Proceedings of the Computational Science and Its Applications, 2007