Adarsha Rao

According to our database, Adarsha Rao authored at least 6 papers between 2008 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2011

USHA: Unified software and hardware architecture for video decoding.

Adarsha Rao, S. K. Nandy, Hristo Nikolov, Ed F. Deprettere

Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011

2010

A hardware accelerated system for deep packet inspection.

Adarsha Rao, Pramod P. Udupa

Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

2009

REDEFINE: Runtime reconfigurable polymorphic ASIC.

Mythri Alle, Keshavan Varadarajan, Alexander Fell, C. Ramesh Reddy, Joseph Nimmy, Saptarsi Das, Prasenjit Biswas, Jugantor Chetia, Adarsha Rao, S. K. Nandy, Ranjani Narayan

ACM Trans. Embed. Comput. Syst., 2009

An Input Triggered Polymorphic ASIC for H.264 Decoding.

Adarsha Rao, Mythri Alle, Sainath V, Reyaz Shaik, Rajashekhar Chowhan, Sreeramula Sankaraiah, Sravanthi Mantha, S. K. Nandy, Ranjani Narayan

Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009

2008

Synthesis of application accelerators on Runtime Reconfigurable Hardware.

Mythri Alle, Keshavan Varadarajan, Ramesh C. Ramesh, Joseph Nimmy, Alexander Fell, Adarsha Rao, S. K. Nandy, Ranjani Narayan

Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

Architecture of a polymorphic ASIC for interoperability across multi-mode H.264 decoders.

Adarsha Rao, Mythri Alle, S. K. Nandy, Ranjani Narayan

Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008