Quinn Jacobson

According to our database1, Quinn Jacobson authored at least 21 papers between 1995 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
The History, Status, and Future of FPGAs: Hitting a nerve with field-programmable gate arrays.
ACM Queue, 2020

The history, status, and future of FPGAs.
Commun. ACM, 2020

2013
Making I/O Virtualization Easy with Device Files
CoRR, 2013

MARS: a muscle activity recognition system enabling self-configuring musculoskeletal sensor networks.
Proceedings of the 12th International Conference on Information Processing in Sensor Networks (co-located with CPS Week 2013), 2013

2012
Enhancing Privacy and Accuracy in Probe Vehicle-Based Traffic Monitoring via Virtual Trip Lines.
IEEE Trans. Mob. Comput., 2012

[MARS] a real time motion capture and muscle fatigue monitoring tool.
Proceedings of the 10th ACM Conference on Embedded Network Sensor Systems, 2012

2009
A framework of energy efficient mobile sensing for automatic user state recognition.
Proceedings of the 7th International Conference on Mobile Systems, 2009

Lagrangian sensing: traffic estimation with mobile devices.
Proceedings of the American Control Conference, 2009

2008
Virtual trip lines for distributed privacy-preserving traffic monitoring.
Proceedings of the 6th International Conference on Mobile Systems, 2008

2006
Disintermediated Active Communication.
IEEE Comput. Archit. Lett., 2006

Architectural Support for Software Transactional Memory.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2000
Trace preconstruction.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

1999
Web Prefetching Between Low-Bandwidth Clients and Proxies: Potential and Performance.
Proceedings of the 1999 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, 1999

A Study of Control Independence in Superscalar Processors.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

Instruction Pre-Processing in Trace Processors.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998
Destage Algorithms for Disk Arrays with Nonvolatile Caches.
IEEE Trans. Computers, 1998

1997
Trace Processors.
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997

Path-Based Next Trace Prediction.
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997

Control Flow Speculation in Multiscalar Processors.
Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997

1995
CPU design kit: an instructional prototyping platform for teaching processor design.
Proceedings of the 1995 Workshop on Computer Architecture Education, 1995

Destage Algorithms for Disk Arrays with Non-Volatile Caches.
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995


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