Michael J. Flynn

According to our database1, Michael J. Flynn authored at least 149 papers between 1963 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

ACM Fellow

ACM Fellow 1994, "For his important and seminal contribution to processor organization and classification, computer arithmetic, and performance evaluation.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Homepages:

On csauthors.net:

Bibliography

2017
Edward J. McCluskey 1929-2016.
IEEE Design & Test, 2017

Chapter Two - Advances in Dataflow Systems.
Advances in Computers, 2017

2016
A 180 GHz prototype for a geostationary microwave imager/sounder-GeoSTAR-III.
Proceedings of the 2016 IEEE International Geoscience and Remote Sensing Symposium, 2016

2015
Consistency and Standardization of Color in Medical Imaging: a Consensus Report.
J. Digital Imaging, 2015

2014
Scaling Reverse Time Migration Performance through Reconfigurable Dataflow Engines.
IEEE Micro, 2014

Parallel Architectures.
Proceedings of the Computing Handbook, 2014

2013
Finite-Difference Wave Propagation Modeling on Special-Purpose Dataflow Machines.
IEEE Trans. Parallel Distrib. Syst., 2013

ACR-AAPM-SIIM Technical Standard for Electronic Practice of Medical Imaging.
J. Digital Imaging, 2013

ACR-AAPM-SIIM Practice Guideline for Digital Radiography.
J. Digital Imaging, 2013

Moving from petaflops to petadata.
Commun. ACM, 2013

Welcome.
Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

2012
Dataflow supercomputing.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011
IBM System/360 Model 91.
Proceedings of the Encyclopedia of Parallel Computing, 2011

Flynn's Taxonomy.
Proceedings of the Encyclopedia of Parallel Computing, 2011

Beyond Traditional Microprocessors for Geoscience High-Performance Computing Applications.
IEEE Micro, 2011

GeoSTAR-II: A prototype water vapor imager/sounder for the PATH mission.
Proceedings of the 2011 IEEE International Geoscience and Remote Sensing Symposium, 2011

More than 50 years of parallel processing and still no easy path to speedup.
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

2008
Computer Architecture.
Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008

Introduction to Grayscale Calibration and Related Aspects of Medical Imaging Grade Liquid Crystal Displays.
J. Digital Imaging, 2008

Finding Speedup in Parallel Processors.
Proceedings of the 7th International Symposium on Parallel and Distributed Computing (ISPDC 2008), 2008

2007
Keynote Speech: Avoiding the Memory Bottleneck through Structured Arrays.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

The Future Is Parallel But It May Not Be Easy.
Proceedings of the High Performance Computing, 2007

2006
Dynamic clock-frequencies for FPGAs.
Microprocessors and Microsystems, 2006

2005
Microprocessor Design Issues: Thoughts on the Road Ahead.
IEEE Micro, 2005

Yesterday and Tomorrow: A View on Progress in Computer Design.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Area - Time - Power and Design effort: the basic tradeoffs in Application Specific Systems.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2004
Systematic IEEE rounding method for high-speed floating-point multipliers.
IEEE Trans. VLSI Syst., 2004

Guest Editors' Introduction: Hot Chips 15--Scaling the Silicon Mountain.
IEEE Micro, 2004

Visualization of x-ray microtomography data for a human tooth atlas.
Proceedings of the Medical Imaging 2004: Visualization, 2004

Computer Architecture and Technology: Some Thoughts on the Road Ahead.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

2003
Assessment of a Novel, High-Resolution, Color, AMLCD for Diagnostic Medical Image Display: Luminance Performance and DICOM Calibration.
J. Digital Imaging, 2003

Clinical verification of TG18 methodology for display quality evaluation.
Proceedings of the Medical Imaging 2003: Visualization, 2003

Accurate measurement of monochrome luminance palettes for the calibration of medical LCD monitors.
Proceedings of the Medical Imaging 2003: Visualization, 2003

The Case for a Redundant Format in Floating Point Arithmetic.
Proceedings of the 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 2003

2002
Programmed solutions: the step beyond programmed logic [computer architecture].
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

2001
Object-oriented domain specific compilers for programming FPGAs.
IEEE Trans. VLSI Syst., 2001

CAD Tools for System-Level Modeling and Implementation.
Software Focus, 2001

Method for in-field evaluation of the modulation transfer function of electronic display devices.
Proceedings of the Medical Imaging 2001: Visualization, 2001

Optimal display processing for digital radiography.
Proceedings of the Medical Imaging 2001: Visualization, 2001

Luminance response calibration using multiple display channels.
Proceedings of the Medical Imaging 2001: Visualization, 2001

Technology Trends and Adaptive Computing.
Proceedings of the Field-Programmable Logic and Applications, 2001

High-Performance Floating Point Divide.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

2000
Hardware and software cache prefetching techniques for MPEG benchmarks.
IEEE Trans. Circuits Syst. Video Techn., 2000

Using Simple Tools to Evaluate Complex Architectural Trade-offs.
IEEE Micro, 2000

Exploiting Parallelism and Data Locality of Systolic Array Applications using Multi-Ported FPGA.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Coarse-grained carry architecture for FPGA (poster abstract).
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2000

StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1999
Deep submicron microprocessor design issues.
IEEE Micro, 1999

Basic issues in microprocessor architecture.
Journal of Systems Architecture, 1999

Image quality degradation by light scattering in display devices.
J. Digital Imaging, 1999

Multiprocessor Architecture Using an Audit Trail for Fault Tolerance.
Proceedings of the Digest of Papers: FTCS-29, 1999

1998
Minimizing the complexity of SRT tables.
IEEE Trans. VLSI Syst., 1998

Reducing the Mean Latency of Floating-Point Addition.
Theor. Comput. Sci., 1998

Technology Scaling Effects on Multipliers.
IEEE Trans. Computers, 1998

Computer Engineering 30 Years After the IBM Model 91.
IEEE Computer, 1998

Hardware software tri-design of encryption for mobile communication units.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

An Automated Method for Software Controlled Cache Prefetching.
Proceedings of the Thirty-First Annual Hawaii International Conference on System Sciences, 1998

Effectiveness of Producer-Initiated Communication.
Proceedings of the Thirty-First Annual Hawaii International Conference on System Sciences, 1998

PAM-Blox: High Performance FPGA Design for Adaptive Computing.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997
Division Algorithms and Implementations.
IEEE Trans. Computers, 1997

Design Issues in Division and Other Floating-Point Operations.
IEEE Trans. Computers, 1997

The SNAP Project: Building Validated Floating Point.
J. UCS, 1997

Evaluation of Communication Mechanisms in Invalidate-Based Shared Memory Multiprocessors.
Proceedings of the Parallel Computer Routing and Communication, 1997

Performance Enhancement of H.263 Encoder Based on Zero Coefficient Prediction.
Proceedings of the Fifth ACM International Conference on Multimedia '97, 1997

Image degradation by glare in radiologic display devices.
Proceedings of the Medical Imaging 1997: Image Display, 1997

Prediction Caches for Superscalar Processors.
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997

What's ahead in computer design?
Proceedings of the 23rd EUROMICRO Conference '97, 1997

An evaluation of video fidelity metrics.
Proceedings of the Proceedings IEEE COMPCON 97, 1997

The SNAP Project: Design of Floating Point Arithmetic Unit.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

Time and Area Optimization in Processor Architecture.
Proceedings of the Architektur von Rechensystemen, Arbeitsteilige Systemarchitekturen: Konzepte, Lösungen, Anwendungen, Trends, 1997

1996
Hardware Starting Approximation Method and Its Application to the Square Root Operation.
IEEE Trans. Computers, 1996

Reducing division latency with reciprocal caches.
Reliable Computing, 1996

Parallel Architectures.
ACM Comput. Surv., 1996

Parallel Implementation of Cone Beam Tomography.
Proceedings of the 1996 International Conference on Parallel Processing, 1996

A Comparison of Hardware Prefetching Techniques for Mulimedia Benchmarks.
Proceedings of the IEEE International Conference on Multimedia Computing and Systems, 1996

A Variable Latency Pipelined Floating-Point Adder.
Proceedings of the Euro-Par '96 Parallel Processing, 1996

Improving Performance for MPEG Players.
Proceedings of the Forty-First IEEE Computer Society International Conference: Technologies for the Information Superhighway, 1996

1995
Evaluating Performance Tradeoffs Between Fine-Grained and Coarse-Grained Alternatives.
IEEE Trans. Parallel Distrib. Syst., 1995

System Design Using Wave-Pipelining: A CMOS VLSI Vector Unit.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

The SNAP Project: Towards Sub-Nanosecond Arithmetic.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995

1994
Fast multiplication in VLSI using wave pipelining techniques.
VLSI Signal Processing, 1994

Instruction Window Size Trade-Offs and Characterization of Program Parallelism.
IEEE Trans. Computers, 1994

A Bubble Propagation Model for Pipeline Performance.
J. Parallel Distrib. Comput., 1994

Write grouping for update-based cache coherence protocols.
Proceedings of the Sixth IEEE Symposium on Parallel and Distributed Processing, 1994

A 16x16-bit Static CMOS Wave-Pipelined Multiplier.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

The Impact of Cache Coherence Protocols on Systems using Fine-Grain Data Synchronization.
Proceedings of the Parallel Architectures and Compilation Techniques, 1994

Update-Based Cache Coherence Protocols for Scalable Shared-Memory Multiprocessors.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

Analytical Modeling of Multithreaded Pipeline Performance.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

1993
Designing high-performance digital circuits using wave pipelining: algorithms and practical experiences.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1993

Parallel High-Radix Nonrestoring Division.
IEEE Trans. Computers, 1993

Linked List Cache Coherence for Scalable Shared Memory Multiprocessors.
Proceedings of the Seventh International Parallel Processing Symposium, 1993

Hardware starting approximation for the square root operation.
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993

1992
Fast Division Using Accurate Quotient Approximations to Reduce the Number of Iterations.
IEEE Trans. Computers, 1992

High-Speed Addition in CMOS.
IEEE Trans. Computers, 1992

Processor Architecture and Data Buffering.
IEEE Trans. Computers, 1992

The effect of page allocation on caches.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992

Translation hint buffers to reduce access time of physically-addressed instruction caches.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992

1991
Cost-efficient high-radix division.
VLSI Signal Processing, 1991

Branch Strategies: Modeling and Optimization.
IEEE Trans. Computers, 1991

Spectrum of choices: superpipelined, superscalar, or multiprocessor?
Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing, 1991

Architectural Mechanisms to Support Three-Dimensional Lattice Gas Simulations.
Proceedings of the 3rd Annual ACM Symposium on Parallel Algorithms and Architectures, 1991

Strategies for Branch Target Buffers.
Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture, 1991

Fast division using accurate quotient approximations to reduce the number of iterations.
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991

Scalable Cache Coherence for Shared Memory Multiprocessors.
Proceedings of the Parallel Computation, First International ACPC Conference, Salzburg, Austria, September 30, 1991

1990
The Effects of Processor Architecture on Instruction Memory Traffic.
ACM Trans. Comput. Syst., 1990

Optimal Pipelining.
J. Parallel Distrib. Comput., 1990

Instruction sets and their implementations.
Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990

1989
ASIC microprocessors.
Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989

The Computer Architect's Workbench.
Proceedings of the Information Processing 89, Proceedings of the IFIP 11th World Computer Congress, San Francisco, USA, August 28, 1989

Inserting active delay elements to achieve wave pipelining.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

Analyzing computer architectures.
IEEE, ISBN: 978-0-8186-8857-7, 1989

1988
Performance trade-offs for microprocessor cache memories.
IEEE Micro, 1988

1987
Reducing Execution Parameters Through Correspondence in Computer Architecture.
IBM Journal of Research and Development, 1987

And Now a Case for More Complex Instruction Sets.
IEEE Computer, 1987

Effects of Layered Protocols on Performance of a Packet Radio Network.
Proceedings of the COMPCON'87, 1987

1986
The Stanford Packet Radio Network.
Proceedings of the Spring COMPCON'86, 1986

1985
On Instruction Sets and Their Formats.
IEEE Trans. Computers, 1985

1984
Measures of Ideal Execution Architectures.
IBM Journal of Research and Development, 1984

1983
Execution Architecture: The DELtran Experiment.
IEEE Trans. Computers, 1983

Comparative Analysis of Computer Architectures.
Proceedings of the Information Processing 83, 1983

1982
Concurrency Detection in Language-Oriented Processing Systems.
Proceedings of the Proceedings of the 3rd International Conference on Distributed Computing Systems, 1982

1981
Customized Microcomputers.
Proceedings of the Microcomputer System Design, 1981

Perspective on microcomputers.
Proceedings of the Microcomputer System Design, 1981

1980
Parallelism and Representation Problems in Distributed Systems.
IEEE Trans. Computers, 1980

Directions and Issues in Architecture and Language.
IEEE Computer, 1980

1978
Computer Organization and Architecture.
Proceedings of the Operating Systems, 1978

1975
A Course of Study in Computer Hardware Architecture.
IEEE Computer, 1975

EMMY: an emulation system for user microprogramming.
Proceedings of the American Federation of Information Processing Societies: 1975 National Computer Conference, 1975

1974
Trends and Problems in Computer Organizations.
Proceedings of the Information Processing, 1974

1973
Representation of Concurrency with Ordering Matrices.
IEEE Trans. Computers, 1973

Logical Network Cost and Entropy.
IEEE Trans. Computers, 1973

Comments on Capabilities, Limitations and Correctness of Petri Nets.
Proceedings of the 1st Annual Symposium on Computer Architecture, 1973

1972
Pipelining of Arithmetic Functions.
IEEE Trans. Computers, 1972

Some Computer Organizations and Their Effectiveness.
IEEE Trans. Computers, 1972

B72-3 Computer Structures, Readings and Examples.
IEEE Trans. Computers, 1972

Shared Resource Multiprocessing.
IEEE Computer, 1972

Pipelining of arithmetic functions.
Proceedings of the 2nd IEEE Symposium on Computer Arithmetic, 1972

Toward more efficient computer organizations.
Proceedings of the American Federation of Information Processing Societies: AFIPS Conference Proceedings: 1972 Spring Joint Computer Conference, 1972

1971
Microprogramming: An Introduction and a Viewpoint.
IEEE Trans. Computers, 1971

Dynamic Microprogramming: Processor Organization and Programming.
Commun. ACM, 1971

Shared Internal Resources in Multiprocessor.
Proceedings of the Information Processing, Proceedings of IFIP Congress 1971, Volume 1, 1971

Coding techniques for failure recovery in a distributive modular memory organization.
Proceedings of the American Federation of Information Processing Societies: AFIPS Conference Proceedings: 1971 Spring Joint Computer Conference, 1971

1970
Detection and Parallel Execution of Independent Instructions.
IEEE Trans. Computers, 1970

On Division by Functional Iteration.
IEEE Trans. Computers, 1970

System Design of a Dynamic Microprocessor.
IEEE Trans. Computers, 1970

1968
Addressing patterns and memory handling algorithms.
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '68 Fall Joint Computer Conference, December 9-11, 1968, San Francisco, California, USA, 1968

1967
Intrinsic multiprocessing.
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '67 Spring Joint Computer Conference, 1967

1966
A prospectus on integrated electronics and computer architecture.
Proceedings of the American Federation of Information Processing Societies: Proceedings of the AFIPS '66 Fall Joint Computer Conference, 1966

1963
Variable Field-Length Data Manipulation in a Fixed Word-Length Memory.
IEEE Trans. Electronic Computers, 1963


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