Rafael Billig Tonetto

According to our database1, Rafael Billig Tonetto authored at least 8 papers between 2018 and 2026.

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Timeline

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Bibliography

2026
ENFOR-SA: End-to-end Cross-layer Transient Fault Injector for Efficient and Accurate DNN Reliability Assessment on Systolic Arrays.
CoRR, February, 2026

2025
A variation-aware methodology for improved processor designs for the edge computing domain.
Des. Autom. Embed. Syst., March, 2025

2022
SNAP: Selective NTV Heterogeneous Architectures for Power-Efficient Edge Computing.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2020
A Reliability-Oriented Machine Learning Strategy for Heterogeneous Multicore Application Mapping.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Machine Learning Approach for Reliability-Aware Application Mapping for Heterogeneous Multicores.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
A Knapsack Methodology for Hardware-based DMR Protection against Soft Errors in Superscalar Out-of-Order Processors.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Improving Software-based Techniques for Soft Error Mitigation in OoO Superscalar Processors.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
Precise evaluation of the fault sensitivity of OoO superscalar processors.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018


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