Raghavendra Pradyumna Pothukuchi

According to our database, Raghavendra Pradyumna Pothukuchi authored at least 18 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2023

HALO: A Hardware-Software Co-Designed Processor for Brain-Computer Interfaces.

Karthik Sriram, Ioannis Karageorgos, Xiayuan Wen, Ján Veselý, Nick Lindsay, Michael Wu, Lenny Khazan, Raghavendra Pradyumna Pothukuchi, Rajit Manohar, Abhishek Bhattacharjee

IEEE Micro, 2023

Quantum Cognitive Modeling: New Applications and Systems Research Directions.

Raghavendra Pradyumna Pothukuchi, Leon Lufkin, Yu Jun Shen, Alejandro Simon, Rome Thorstenson, Bernardo Eilert Trevisan, Michael Tu, Mudi Yang, Ben Foxman, Viswanatha Srinivas Pothukuchi, Gunnar Epping, Bryant J. Jongkees, Thi Ha Kyaw, Jerome R. Busemeyer, Jonathan D. Cohen, Abhishek Bhattacharjee

CoRR, 2023

Mitigating Catastrophic Forgetting in Long Short-Term Memory Networks.

Ketaki Joshi, Raghavendra Pradyumna Pothukuchi, Andre Wibisono, Abhishek Bhattacharjee

CoRR, 2023

Defensive ML: Defending Architectural Side-channels with Adversarial Obfuscation.

Hyoungwook Nam, Raghavendra Pradyumna Pothukuchi, Bo Li, Nam Sung Kim, Josep Torrellas

CoRR, 2023

A Multi-Site Accelerator-Rich Processing Fabric for Scalable Brain-Computer Interfacing.

Karthik Sriram, Raghavendra Pradyumna Pothukuchi, Michal Gerasimiuk, Oliver Ye, Muhammed Ugur, Rajit Manohar, Anurag Khandelwal, Abhishek Bhattacharjee

CoRR, 2023

SCALO: An Accelerator-Rich Distributed System for Scalable Brain-Computer Interfacing.

Karthik Sriram, Raghavendra Pradyumna Pothukuchi, Michal Gerasimiuk, Muhammed Ugur, Oliver Ye, Rajit Manohar, Anurag Khandelwal, Abhishek Bhattacharjee

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

Prefetching Using Principles of Hippocampal-Neocortical Interaction.

Michael Wu, Ketaki Joshi, Andrew Sheinberg, Guilherme Cox, Anurag Khandelwal, Raghavendra Pradyumna Pothukuchi, Abhishek Bhattacharjee

Proceedings of the 19th Workshop on Hot Topics in Operating Systems, 2023

2022

Distill: Domain-Specific Compilation for Cognitive Models.

Ján Veselý, Raghavendra Pradyumna Pothukuchi, Ketaki Joshi, Samyak Gupta, Jonathan D. Cohen, Abhishek Bhattacharjee

Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2022

2021

Cognac: Domain-Specific Compilation for Cognitive Models.

Ján Veselý, Raghavendra Pradyumna Pothukuchi, Ketaki Joshi, Samyak Gupta, Jonathan D. Cohen, Abhishek Bhattacharjee

CoRR, 2021

Maya: Using Formal Control to Obfuscate Power Side Channels.

Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros G. Voulgaris, Alexander G. Schwing, Josep Torrellas

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020

Intelligent systems for efficiency and security

Raghavendra Pradyumna Pothukuchi

PhD thesis, 2020

2019

Maya: Falsifying Power Sidechannels with Operating System Support.

Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros G. Voulgaris, Josep Torrellas

CoRR, 2019

Tangram: Integrated Control of Heterogeneous Computers.

Raghavendra Pradyumna Pothukuchi, Joseph L. Greathouse, Karthik Rao, Christopher Erb, Leonardo Piga, Petros G. Voulgaris, Josep Torrellas

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2018

Yukta: Multilayer Resource Controllers to Maximize Efficiency.

Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros G. Voulgaris, Josep Torrellas

Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

Structured Singular Value Control for Modular Resource Management in Multilayer Computers.

Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros G. Voulgaris, Josep Torrellas

Proceedings of the 57th IEEE Conference on Decision and Control, 2018

2017

Multilayer Compute Resource Management with Robust Control Theory.

Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros G. Voulgaris, Josep Torrellas

Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

Sthira: A Formal Approach to Minimize Voltage Guardbands under Variation in Networks-on-Chip for Energy Efficiency.

Raghavendra Pradyumna Pothukuchi, Amin Ansari, Bhargava Gopireddy, Josep Torrellas

Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016

Using Multiple Input, Multiple Output Formal Control to Maximize Resource Efficiency in Architectures.

Raghavendra Pradyumna Pothukuchi, Amin Ansari, Petros G. Voulgaris, Josep Torrellas

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016