Rashmi Jha

Orcid: 0000-0002-2656-5945

According to our database1, Rashmi Jha authored at least 40 papers between 2012 and 2023.

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Bibliography

2023
Resilient Embedded Systems Designs via on the Fly Generation of Adaptive Degenerate Components Using Machine Learning.
IEEE Trans. Computers, May, 2023

Studying Accuracy of Machine Learning Models Trained on Lab Lifting Data in Solving Real-World Problems Using Wearable Sensors for Workplace Safety.
CoRR, 2023

Neuromorphic Dendritic Synapse Integrating Gated-RRAM.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
Machine Learning for Detection and Risk Assessment of Lifting Action.
IEEE Trans. Hum. Mach. Syst., 2022

Securing 3rd-Party HDL IP: a Feasibility Study Using Evolutionary Methods.
J. Hardw. Syst. Secur., 2022

A Spiking Neuromorphic Architecture Using Gated-RRAM for Associative Memory.
ACM J. Emerg. Technol. Comput. Syst., 2022

Exploring the associative learning capabilities of the segmented attractor network for lifelong learning.
Frontiers Artif. Intell., 2022

Intrinsically Secure Non-Volatile Memory Using ReRAM Devices.
IEEE Access, 2022

NeuroSOFM-Classifier: A Low Power Classifier Using Continuous Real-Time Unsupervised Clustering.
Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, 2022

2021
A Compact Gated-Synapse Model for Neuromorphic Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Fully BEOL-Compatible Switch Boxes Using RRAMs and Thin Film Transistors for Reconfigurable and Secure ICs.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Educating the Next Generation of Cybersecurity Defenders at the University of Cincinnati.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Adversarial Attack Mitigation Approaches Using RRAM-Neuromorphic Architectures.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

Semi-Automatic Bug Generation Using Test Case Negation.
Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2021

2020
Development of a Short-Term to Long-Term Supervised Spiking Neural Network Processor.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Vulnerabilities and Reliability of ReRAM Based PUFs and Memory Logic.
IEEE Trans. Reliab., 2020

A neuromorphic SLAM architecture using gated-memristive synapses.
Neurocomputing, 2020

A CRISPR-Cas-Inspired Mechanism for Detecting Hardware Trojans in FPGA Devices.
CoRR, 2020

A deep learning approach for lower back-pain risk prediction during manual lifting.
CoRR, 2020

Detecting Malware Code as Video With Compressed, Time-Distributed Neural Networks.
IEEE Access, 2020

Unsupervised Clustering of COVID-19 Chest X-Ray Images with a Self-Organizing Feature Map.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Secured IC Provisioning Using Advanced Memory Devices.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Relating the Empirical Foundations of Attack Generation and Vulnerability Discovery.
Proceedings of the 21st International Conference on Information Reuse and Integration for Data Science, 2020

Memristive Device Variability Performance Impact on Neuromorphic Machine Learning Hardware.
Proceedings of the 11th International Green and Sustainable Computing Workshops, 2020

2019
Guest Editorial Nature-Inspired Approaches for IoT and Big Data.
IEEE Internet Things J., 2019

Operating Temperature Based Vulnerabilities in ReRAM.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Segmented Attractor Network for Neuromorphic Associative Learning.
Proceedings of the International Conference on Neuromorphic Systems, 2019

2018
Gate-Controlled Memristors and their Applications in Neuromorphic Architectures.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2017
Novel spiking neural network utilizing short-term and long-term dynamics of 3-terminal resistive crossbar arrays.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
Self Current Limiting MgO ReRAM Devices for Low-Power Non-Volatile Memory Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Multi-Bit Read and Write Methodologies for Diode-STTRAM Crossbar Array.
CoRR, 2016

2015
Switching characteristics of MgO based self-compliant ReRAM devices.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2014
A hardware-based approach for implementing biological visual cortex-inspired image learning and recognition.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Impact of coupling capacitance on read operation of RRAM devices in 1D1R crossbar architectures.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

An integrated active-pixel-sensor and memristive platform for neural-inspired image learning and recognition.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013
Doped HfO2 based nanoelectronic memristive devices for self-learning neural circuits and architecture.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

Understanding the impact of diode parameters on sneak current in 1Diode 1ReRAM crossbar architectures.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

Content-aware encoding for improving energy efficiency in multi-level cell resistive random access memory.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

Understanding the impact of slow electro-forming in Resistive Random Access Memories.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012
Understanding the Switching Mechanism in Transition Metal Oxide Based ReRAM Devices.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012


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