Onur Kayiran

According to our database, Onur Kayiran authored at least 31 papers between 2013 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

A Research Retrospective on AMD's Exascale Computing Journey.

Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Vignesh Adhinarayanan, Shaizeen Aga, Derrick Aguren, Varun Agrawal, Ashwin M. Aji, Johnathan Alsop, Paul T. Bauman, Bradford M. Beckmann, Majed Valad Beigi, Sergey Blagodurov, Travis Boraten, Michael Boyer, William C. Brantley, Noel Chalmers, Shaoming Chen, Kevin Cheng, Michael L. Chu, David Cownie, Nicholas Curtis, Joris Del Pino, Nam Duong, Alexandru Dutu, Yasuko Eckert, Christopher Erb, Chip Freitag, Joseph L. Greathouse, Sudhanva Gurumurthi, Anthony Gutierrez, Khaled Hamidouche, Sachin Hossamani, Wei Huang, Mahzabeen Islam, Nuwan Jayasena, John Kalamatianos, Onur Kayiran, Jagadish Kotra, Alan Lee, Daniel Lowell, Niti Madan, Abhinandan Majumdar, Nicholas Malaya, Srilatha Manne, Susumu Mashimo, Damon McDougall, Elliot Mednick, Michael Mishkin, Mark Nutter, Indrani Paul, Matthew Poremba, Brandon Potter, Kishore Punniyamurthy, Sooraj Puthoor, Steven E. Raasch, Karthik Rao, Gregory Rodgers, Marko Scrbak, Mohammad Seyedzadeh, John Slice, Vilas Sridharan, René van Oostrum, Eric Van Tassell, Abhinav Vishnu, Samuel Wasmundt, Mark Wilkening, Noah Wolfe, Mark Wyse, Adithya Yalavarti, Dmitri Yudanov

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2021

Efficient Cache Utilization via Model-aware Data Placement for Recommendation Models.

Mohamed Assem Ibrahim, Onur Kayiran, Shaizeen Aga

Proceedings of the MEMSYS 2021: The International Symposium on Memory Systems, Washington, USA, September 27, 2021

Analyzing and Leveraging Decoupled L1 Caches in GPUs.

Mohamed Assem Ibrahim, Onur Kayiran, Yasuko Eckert, Gabriel H. Loh, Adwait Jog

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

Analyzing and Leveraging Shared L1 Caches in GPUs.

Mohamed Assem Ibrahim, Onur Kayiran, Yasuko Eckert, Gabriel H. Loh, Adwait Jog

Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019

Optimizing GPU Cache Policies for MI Workloads.

Johnathan Alsop, Matthew D. Sinclair, Srikant Bharadwaj, Alexandru Dutu, Anthony Gutierrez, Onur Kayiran, Michael LeBeane, Sooraj Puthoor, Xianwei Zhang, Tsung Tai Yeh, Bradford M. Beckmann

CoRR, 2019

Opportunistic computing in GPU architectures.

Ashutosh Pattnaik, Xulong Tang, Onur Kayiran, Adwait Jog, Asit K. Mishra, Mahmut T. Kandemir, Anand Sivasubramaniam, Chita R. Das

Proceedings of the 46th International Symposium on Computer Architecture, 2019

Optimizing GPU Cache Policies for MI Workloads.

Johnathan Alsop, Xianwei Zhang, Tsung Tai Yeh, Bradford M. Beckmann, Matthew D. Sinclair, Srikant Bharadwaj, Alexandru Dutu, Anthony Gutierrez, Onur Kayiran, Michael LeBeane, Brandon Potter, Sooraj Puthoor

Proceedings of the IEEE International Symposium on Workload Characterization, 2019

Analyzing and Leveraging Remote-Core Bandwidth for Enhanced Performance in GPUs.

Mohamed Assem Ibrahim, Hongyuan Liu, Onur Kayiran, Adwait Jog

Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019

2018

CODA: Enabling Co-location of Computation and Data for Multiple GPU Systems.

Hyojong Kim, Ramyad Hadidi, Lifeng Nai, Hyesoon Kim, Nuwan Jayasena, Yasuko Eckert, Onur Kayiran, Gabriel H. Loh

ACM Trans. Archit. Code Optim., 2018

Quantifying Data Locality in Dynamic Parallelism in GPUs.

Xulong Tang, Ashutosh Pattnaik, Onur Kayiran, Adwait Jog, Mahmut Taylan Kandemir, Chita R. Das

Proc. ACM Meas. Anal. Comput. Syst., 2018

Holistic Management of the GPGPU Memory Hierarchy to Manage Warp-level Latency Tolerance.

Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Mahmut T. Kandemir, Onur Mutlu

CoRR, 2018

Architectural Support for Efficient Large-Scale Automata Processing.

Hongyuan Liu, Mohamed Assem Ibrahim, Onur Kayiran, Sreepathi Pai, Adwait Jog

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Modular Routing Design for Chiplet-Based Systems.

Jieming Yin, Zhifeng Lin, Onur Kayiran, Matthew Poremba, Muhammad Shoaib Bin Altaf, Natalie D. Enright Jerger, Gabriel H. Loh

Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

Efficient and Fair Multi-programming in GPUs via Effective Bandwidth Management.

Haonan Wang, Fan Luo, Mohamed Assem Ibrahim, Onur Kayiran, Adwait Jog

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level.

Anthony Gutierrez, Bradford M. Beckmann, Alexandru Dutu, Joseph Gross, Michael LeBeane, John Kalamatianos, Onur Kayiran, Matthew Poremba, Brandon Potter, Sooraj Puthoor, Matthew D. Sinclair, Mark Wyse, Jieming Yin, Xianwei Zhang, Akshay Jain, Timothy G. Rogers

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017

CODA: Enabling Co-location of Computation and Data for Near-Data Processing.

Hyojong Kim, Ramyad Hadidi, Lifeng Nai, Hyesoon Kim, Nuwan Jayasena, Yasuko Eckert, Onur Kayiran, Gabriel H. Loh

CoRR, 2017

There and Back Again: Optimizing the Interconnect in Networks of Memory Cubes.

Matthew Poremba, Itir Akgun, Jieming Yin, Onur Kayiran, Yuan Xie, Gabriel H. Loh

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

Design and Analysis of an APU for Exascale Computing.

Thiruvengadam Vijayaraghavan, Yasuko Eckert, Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Bradford M. Beckmann, William C. Brantley, Joseph L. Greathouse, Wei Huang, Arun Karunanithi, Onur Kayiran, Mitesh R. Meswani, Indrani Paul, Matthew Poremba, Steven Raasch, Steven K. Reinhardt, Greg Sadowski, Vilas Sridharan

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

Controlled Kernel Launch for Dynamic Parallelism in GPUs.

Xulong Tang, Ashutosh Pattnaik, Huaipan Jiang, Onur Kayiran, Adwait Jog, Sreepathi Pai, Mohamed Assem Ibrahim, Mahmut T. Kandemir, Chita R. Das

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016

Exploiting Core Criticality for Enhanced GPU Performance.

Adwait Jog, Onur Kayiran, Ashutosh Pattnaik, Mahmut T. Kandemir, Onur Mutlu, Ravishankar R. Iyer, Chita R. Das

Proceedings of the 2016 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Science, 2016

OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures.

Jia Zhan, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Yuan Xie

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Prefetching Techniques for Near-memory Throughput Processors.

Reena Panda, Yasuko Eckert, Nuwan Jayasena, Onur Kayiran, Michael Boyer, Lizy Kurian John

Proceedings of the 2016 International Conference on Supercomputing, 2016

Efficient synthetic traffic models for large, complex SoCs.

Jieming Yin, Onur Kayiran, Matthew Poremba, Natalie D. Enright Jerger, Gabriel H. Loh

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

Scheduling Techniques for GPU Architectures with Processing-In-Memory Capabilities.

Ashutosh Pattnaik, Xulong Tang, Adwait Jog, Onur Kayiran, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, Chita R. Das

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

μC-States: Fine-grained GPU Datapath Power Management.

Onur Kayiran, Adwait Jog, Ashutosh Pattnaik, Rachata Ausavarungnirun, Xulong Tang, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, Chita R. Das

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015

Anatomy of GPU Memory System for Multi-Application Execution.

Adwait Jog, Onur Kayiran, Tuba Kesten, Ashutosh Pattnaik, Evgeny Bolotin, Niladrish Chatterjee, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das

Proceedings of the 2015 International Symposium on Memory Systems, 2015

Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance.

Rachata Ausavarungnirun, Saugata Ghose, Onur Kayiran, Gabriel H. Loh, Chita R. Das, Mahmut T. Kandemir, Onur Mutlu

Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014

Managing GPU Concurrency in Heterogeneous Architectures.

Onur Kayiran, Nachiappan Chidambaram Nachiappan, Adwait Jog, Rachata Ausavarungnirun, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, Chita R. Das

Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

2013

Orchestrated scheduling and prefetching for GPGPUs.

Adwait Jog, Onur Kayiran, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, Ravishankar R. Iyer, Chita R. Das

Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

OWL: cooperative thread array aware scheduling techniques for improving GPGPU performance.

Adwait Jog, Onur Kayiran, Nachiappan Chidambaram Nachiappan, Asit K. Mishra, Mahmut T. Kandemir, Onur Mutlu, Ravishankar R. Iyer, Chita R. Das

Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2013

Neither more nor less: Optimizing thread-level parallelism for GPGPUs.

Onur Kayiran, Adwait Jog, Mahmut T. Kandemir, Chita R. Das

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013