Reto Zimmermann

According to our database, Reto Zimmermann authored at least 6 papers between 1993 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2009

Datapath Synthesis for Standard-Cell Design.

Reto Zimmermann

Proceedings of the 19th IEEE Symposium on Computer Arithmetic, 2009

1999

Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication.

Reto Zimmermann

Proceedings of the 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 1999

1997

Low-power logic styles: CMOS versus pass-transistor logic.

Reto Zimmermann, Wolfgang Fichtner

IEEE J. Solid State Circuits, 1997

Hardware implementation of a systolic antenna array signal processor based on CORDIC arithmetic.

Bruno Haller, Matthias Streiff, Urs Fleisch, Reto Zimmermann

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1994

A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm.

Reto Zimmermann, Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

IEEE J. Solid State Circuits, March, 1994

1993

VINCI: Secure Test of a VLSI High-Speed Encryption System.

Heinz Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, Reto Zimmermann, Wolfgang Fichtner

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993