Wolfgang Fichtner

According to our database1, Wolfgang Fichtner
  • authored at least 109 papers between 1982 and 2012.
  • has a "Dijkstra number"2 of four.

Awards

IEEE Fellow

IEEE Fellow 1990, "For the application of numerical modeling to device scaling and submicron transistor optimization.".

Timeline

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Bibliography

2012
Electro-thermal simulation in the time domain of GaN HEMT for RF switch-mode amplifier.
Microelectronics Reliability, 2012

2011
Synthesis of scanning electron microscopy images by high performance computing for the metrology of advanced CMOS processes.
Microelectronics Reliability, 2011

Design of optimum electron beam irradiation processes for the reliability of electric cables used in critical applications.
Microelectronics Reliability, 2011

A New Built-In Defect-Based Testing Technique to Achieve Zero Defects in the Automotive Environment.
J. Electronic Testing, 2011

Atomistic nanoelectronic device engineering with sustained performances up to 1.44 PFlop/s.
Proceedings of the Conference on High Performance Computing Networking, 2011

2010
Signal Transmission by Galvanic Coupling Through the Human Body.
IEEE Trans. Instrumentation and Measurement, 2010

Accurate extraction of the mechanical properties of thin films by nanoindentation for the design of reliable MEMS.
Microelectronics Reliability, 2010

A new built-in screening methodology for Successive Approximation Register Analog to Digital Converters.
Microelectronics Reliability, 2010

Modeling secondary electron images for linewidth measurement by critical dimension scanning electron microscopy.
Microelectronics Reliability, 2010

Novel built-in methodology for defect testing of capacitor oxide in SAR analog to digital converters for critical automotive applications.
Proceedings of the 15th European Test Symposium, 2010

2009
Galvanic Coupling Enabling Wireless Implant Communications.
IEEE Trans. Instrumentation and Measurement, 2009

A new built-in screening methodology to achieve zero defects in the automotive environment.
Microelectronics Reliability, 2009

Multiscale simulation of aluminum thin films for the design of highly-reliable MEMS devices.
Microelectronics Reliability, 2009

Ensuring the reliability of electron beam crosslinked electric cables by the optimization of the dose depth distribution with Monte Carlo simulation.
Microelectronics Reliability, 2009

Implementation of a 2×2 MIMO-OFDM receiver on an application specific processor.
Microelectronics Journal, 2009

Live Demonstration: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

VLSI Implementations of the Cryptographic Hash Functions MD6 and ïrRUPT.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Novel Solution for the Built-in Gate Oxide Stress Test of LDMOS in Integrated Circuits for Automotive Applications.
Proceedings of the 14th IEEE European Test Symposium, 2009

Hardware evaluation of the stream cipher-based hash functions RadioGatún and irRUPT.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers.
IEEE Trans. VLSI Syst., 2008

Multi-user MIMO testbed.
Proceedings of the Third ACM Workshop on Wireless Network Testbeds, 2008

VLSI architecture for data-reduced steering matrix feedback in MIMO systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Hardware-efficient steering matrix computation architecture for MIMO communication systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A Parallel Sparse Linear Solver for Nearest-Neighbor Tight-Binding Problems.
Proceedings of the Euro-Par 2008, 2008

Gram-Schmidt-based QR decomposition for MIMO detection: VLSI implementation and comparison.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
An Attempt to Model the Human Body as a Communication Channel.
IEEE Trans. Biomed. Engineering, 2007

Improving the Accuracy of GMRes with Deflated Restarting.
SIAM J. Scientific Computing, 2007

SCR operation mode of diode strings for ESD protection.
Microelectronics Reliability, 2007

Verification of CDM circuit simulation using an ESD evaluation circuit.
Microelectronics Reliability, 2007

A study of the threshold-voltage suitability as an application-related reliability indicator for planar-gate non-punch-through IGBTs.
Microelectronics Reliability, 2007

Measurement of the transient junction temperature in MOSFET devices under operating conditions.
Microelectronics Reliability, 2007

Wireless Implant Communications for Biomedical Monitoring Sensor Network.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Implementation of a Low-Complexity Frame-Start Detection Algorithm for MIMO Systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

FFT Processor for OFDM Channel Estimation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Reduced-complexity mimo detector with close-to ml error rate performance.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

System-level characterization of a real-time 4×4 MIMO-OFDM transceiver on FPGA.
Proceedings of the 15th European Signal Processing Conference, 2007

A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Moments of the Inverse Scattering Operator of the Boltzmann Equation: Theory and Applications.
SIAM Journal of Applied Mathematics, 2006

Compact modelling and analysis of power-sharing unbalances in IGBT-modules used in traction applications.
Microelectronics Reliability, 2006

Characterization of photonic devices by secondary electron potential contrast.
Microelectronics Reliability, 2006

New technique for the measurement of the static and of the transient junction temperature in IGBT devices under operating conditions.
Microelectronics Reliability, 2006

Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC.
Electr. Notes Theor. Comput. Sci., 2006

K-best MIMO detection VLSI architectures achieving up to 424 Mbps.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Silicon implementation of an MMSE-based soft demapper for MIMO-BICM.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

42% power savings through glitch-reducing clocking strategy in a hearing aid application.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Frame-Start Detector for a 4×4 MIMO-OFDM System.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

VLSI implementation of pipelined sphere decoding with early termination.
Proceedings of the 14th European Signal Processing Conference, 2006

Two-phase resonant clocking for ultra-low-power hearing aid applications.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm.
Proceedings of the 43rd Design Automation Conference, 2006

GALS at ETH Zurich: Success or Failure.
Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2005
Assessment of the Analytical Capabilities of Scanning Capacitance and Scanning Spreading Resistance Microscopy Applied to Semiconductor Devices.
Microelectronics Reliability, 2005

Extraction of Accurate Thermal Compact Models for Fast Electro-Thermal Simulation of IGBT Modules in Hybrid Electric Vehicles.
Microelectronics Reliability, 2005

Two-dimensional Dopant Profiling and Imaging of 4H Silicon Carbide Devices by Secondary Electron Potential Contrast.
Microelectronics Reliability, 2005

Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications.
Proceedings of the Integrated Circuit and System Design, 2005

2004
Characterization of self-heating effects in semiconductor resistors during transmission line pulses.
Microelectronics Reliability, 2004

On the Use of Neural Networks to Solve the Reverse Modelling Problem for the Quantification of Dopant Profiles Extracted by Scanning Probe Microscopy Techniques.
Microelectronics Reliability, 2004

2D Dopant Profiling on 4H Silicon Carbide P+N Junction by Scanning Capacitance and Scanning Electron Microscopy.
Microelectronics Reliability, 2004

A 2 Gb/s balanced AES crypto-chip implementation.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003
Waveform coding for low-power digital filtering of speech data.
IEEE Trans. Signal Processing, 2003

A New Procedure to Define the Zero-Field Condition and to Delineate pn-Junctions in Silicon Devices by Scanning Capacitance Microscopy.
Microelectronics Reliability, 2003

On the behaviour of the selective iodine-based gold etch for the failure analysis of aged optoelectronic devices.
Microelectronics Reliability, 2003

Proof of a simple time-step propagation scheme for Monte Carlo simulation.
Mathematics and Computers in Simulation, 2003

Management decision support using long-term market simulation.
Inf. Syst. E-Business Management, 2003

Variable delay ripple carry adder with carry chain interrupt detection.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 50 Mbps 4×4 maximum likelihood decoder for multiple-input multiple-output systems with QPSK modulation.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

Self-Timed Ring for Globally-Asynchronous Locally-Synchronous Systems.
Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003

2002
Comparison of Single-Particle Monte Carlo Simulation with Measured Output Characteristics of an 0.1µm n-MOSFET.
VLSI Design, 2002

Simulation and Experimental Validation of Scanning Capacitance Microscopy Measurements across Low-doped Epitaxial PN-Junction.
Microelectronics Reliability, 2002

Device Simulation and Backside Laser Interferometry--Powerful Tools for ESD Protection Development.
Microelectronics Reliability, 2002

A Novel Thermomechanics -Based Lifetime Prediction Model for Cycle Fatigue Failure Mechanisms in Power Semiconductors.
Microelectronics Reliability, 2002

2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2002

A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems.
Proceedings of the 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 2002

2001
Diamond-Coated Cantilevers for Scanning Capacitance Microscopy Applications.
Microelectronics Reliability, 2001

Substrate potential shift due to parasitic minority carrier injection in smart-power ICs: measurements and full-chip 3D device simulation.
Microelectronics Reliability, 2001

Advanced 2D/3D ESD device simulation - a powerful tool already used in a pre-Si phase.
Microelectronics Reliability, 2001

Design and Verification of a Stack Processor Virtual Component.
IEEE Micro, 2001

PARDISO: a high-performance serial and parallel sparse linear solver in semiconductor device simulation.
Future Generation Comp. Syst., 2001

A new approach for controlling series-connected IGBT modules.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
Practical Design of Globally-Asynchronous Locally-Synchronous Systems.
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

1999
Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Application of Parallel Sparse Direct Methods in Semiconductor Device and Process Simulation.
Proceedings of the High Performance Computing, Second International Symposium, 1999

Scalable Parallel Sparse Factorization with Left-Right Looking Strategy on Shared Memory Multoprocessors.
Proceedings of the High-Performance Computing and Networking, 7th International Conference, 1999

1997
Optimized terminal current calculation for Monte Carlo device simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1997

1995
Solving Large Sparse Linear Systems in a Distributed Computing Environment.
Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, 1995

1994
Memory Aspects and Performance of Iterative Solvers.
SIAM J. Scientific Computing, 1994

1993
Mixed element trees: a generalization of modified octrees for the generation of meshes for the simulation of complex 3-D semiconductor device structures.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1993

VINCI: Secure Test of a VLSI High-Speed Encryption System.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992
Automatic rectangle-based adaptive mesh generation without obtuse angles.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

A module generator based on the PQ-tree algorithm.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

A Set of New Mapping and Coloring Heuristics for Distributed-Memory Parallel Processors.
SIAM J. Scientific Computing, 1992

Generation of 3-D Delaunay Meshes for Complex Geometries using Iterative Refinement.
Proceedings of the Algorithms, Software, Architecture, 1992

Lazy-expansion symbolic expression approximation in SYNAP.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

1991
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

Omega-an octree-based mixed element grid allocator for the simulation of complex 3-D device structures.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

An adaptive grid refinement strategy for the drift-diffusion equations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

Transistor sizing for large combinational digital CMOS circuits.
Integration, 1991

PILS: an iterative linear solver package for ill-conditioned systems.
Proceedings of the Proceedings Supercomputing '91, 1991

Specification of timing constraints for controller synthesis.
Proceedings of the conference on European design automation, 1991

1989
Extracting transistor changes from device simulations by gradient fitting.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

A new discretization scheme for the semiconductor current continuity equations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989

An Analytic Optimization Technique for Placement of Macro-Cells.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988
A symbolic analysis tool for analog circuit design automation.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1986
Design of VLSI Systems.
Proceedings of the Embedded Systems: New Approaches to Their Formal Description and Design, 1986

1985
Transient Simulation of Silicon Devices and Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985

1982
A Description of MOS Internodal Capacitances for Transient Simulations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1982


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