Ritesh Parikh

According to our database, Ritesh Parikh authored at least 14 papers between 2009 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Resource Conscious Diagnosis and Reconfiguration for NoC Permanent Faults.

Ritesh Parikh, Valeria Bertacco

IEEE Trans. Computers, 2016

2015

Highly Fault-tolerant NoC Routing with Application-aware Congestion Management.

Doowon Lee, Ritesh Parikh, Valeria Bertacco

Proceedings of the 9th International Symposium on Networks-on-Chip, 2015

NoCVision: A Network-on-Chip Dynamic Visualization Solution.

Vaibhav Gogte, Doowon Lee, Ritesh Parikh, Valeria Bertacco

Proceedings of the 8th International Workshop on Network on Chip Architectures, 2015

ReDEEM: A heterogeneous distributed microarchitecture for energy-efficient reliability.

Biruk Mammo, Ritesh Parikh, Valeria Bertacco

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2014

Routing and Topology Reconfiguration for Networks-on-Chip's Runtime Health.

Ritesh Parikh

PhD thesis, 2014

ForEVeR: A complementary formal and runtime verification approach to correct NoC functionality.

Ritesh Parikh, Valeria Bertacco

ACM Trans. Embed. Comput. Syst., 2014

High-radix on-chip networks with low-radix routers.

Animesh Jain, Ritesh Parikh, Valeria Bertacco

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Brisk and limited-impact NoC routing reconfiguration.

Doowon Lee, Ritesh Parikh, Valeria Bertacco

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Power-Aware NoCs through Routing and Topology Reconfiguration.

Ritesh Parikh, Reetuparna Das, Valeria Bertacco

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

uDIREC: unified diagnosis and reconfiguration for frugal bypass of NoC faults.

Ritesh Parikh, Valeria Bertacco

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

2012

Comprehensive online defect diagnosis in on-chip networks.

Amirali Ghofrani, Ritesh Parikh, Saeed Shamshiri, Andrew DeOrio, Kwang-Ting Cheng, Valeria Bertacco

Proceedings of the 30th IEEE VLSI Test Symposium, 2012

2011

Formally enhanced runtime verification to ensure NoC functional correctness.

Ritesh Parikh, Valeria Bertacco

Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

Functional correctness for CMP interconnects.

Rawan Abdel-Khalek, Ritesh Parikh, Andrew DeOrio, Valeria Bertacco

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

2009

A Comparative Performance Evaluation of Network-on-Chip Architectures under Self-Similar Traffic.

Santanu Kundu, Kanchan Manna, Shobhit Gupta, Kundan Kumar, Ritesh Parikh, Santanu Chattopadhyay

Proceedings of the ARTCom 2009, 2009