Rui Shi

According to our database1, Rui Shi authored at least 11 papers between 2005 and 2009.

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Timeline

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Bibliography

2009
Efficient Power Network Analysis Considering Multidomain Clock Gating.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Accurate Eye Diagram Prediction Based on Step Response and Its Application to Low-Power Equalizer Design.
IEICE Trans. Electron., 2009

2008
Off-chip wire distribution and signal analysis.
PhD thesis, 2008

Efficient and accurate eye diagram prediction for high speed signaling.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Fast power network analysis with multiple clock domains.
Proceedings of the 25th International Conference on Computer Design, 2007

Approaching Speed-of-light Distortionless Communication for On-chip Interconnect.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
Layer minimization of escape routing in area array packaging.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Efficient escape routing for hexagonal array of high density I/Os.
Proceedings of the 43rd Design Automation Conference, 2006

An unconditional stable general operator splitting method for transistor level transient analysis.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Surfliner: A Distortionless Electrical Signaling Scheme for Speed of Light On-Chip Communications.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005


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