Wenjian Yu
Orcid: 0000-0003-4897-7251
According to our database1,
Wenjian Yu
authored at least 134 papers
between 1998 and 2024.
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Bibliography
2024
Cheating Suffix: Targeted Attack to Text-To-Image Diffusion Models with Multi-Modal Priors.
CoRR, 2024
2023
IEEE Trans. Knowl. Data Eng., October, 2023
IEEE Trans. Knowl. Data Eng., September, 2023
pGRASS-Solver: A Graph Spectral Sparsification-Based Parallel Iterative Solver for Large-Scale Power Grid Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023
CNN-Cap: Effective Convolutional Neural Network-based Capacitance Models for Interconnect Capacitance Extraction.
ACM Trans. Design Autom. Electr. Syst., July, 2023
Machine-learning-driven Architectural Selection of Adders and Multipliers in Logic Synthesis.
ACM Trans. Design Autom. Electr. Syst., March, 2023
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Generating Adversarial Examples with Better Transferability via Masking Unimportant Parameters of Surrogate Model.
Proceedings of the International Joint Conference on Neural Networks, 2023
Proceedings of the Thirty-Second International Joint Conference on Artificial Intelligence, 2023
Proceedings of the 35th IEEE International Conference on Tools with Artificial Intelligence, 2023
W3Detector: Detecting Fraudulent Online Sellers Based on Temporal and Spacial Information.
Proceedings of the International Conference on Machine Learning and Applications, 2023
Accuracy-Preserving Reduction of Sparsified Reduced Power Grids with A Multilevel Node Aggregation Scheme.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
More Efficient Accuracy-Ensured Waveform Compression for Circuit Simulation Supporting Asynchronous Waveforms.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Efficient and Effective Digital Waveform Compression for Large-scale Logic Simulation of Integrated Circuit.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Computing Effective Resistances on Large Graphs Based on Approximate Inverse of Cholesky Factor.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Parallel Incomplete LU Factorization Based Iterative Solver for Fixed-Structure Linear Equations in Circuit Simulation.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
Accelerated Capacitance Simulation of 3-D Structures with Considerable Amounts of General Floating Metals.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
2022
Volume Reduction and Fast Generation of the Precharacterization Data for Floating Random Walk-Based Capacitance Extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
feGRASS: Fast and Effective Graph Spectral Sparsification for Scalable Power Grid Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
SIAM J. Sci. Comput., 2022
DP-Nets: Dynamic programming assisted quantization schemes for DNN compression and acceleration.
Integr., 2022
CoRR, 2022
Proceedings of the Machine Learning and Knowledge Discovery in Databases, 2022
Approximating Element-Wise Functions of Matrix with Improved Streaming Randomized SVD.
Proceedings of the 34th IEEE International Conference on Tools with Artificial Intelligence, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
Fast Physics-Based Electromigration Analysis for Full-Chip Networks by Efficient Eigenfunction-Based Solution.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Efficient and Accuracy-Ensured Waveform Compression for Transient Circuit Simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
NetMF+: Network Embedding Based on Fast and Effective Single-Pass Randomized Matrix Factorization.
CoRR, 2021
CNN-Cap: Effective Convolutional Neural Network Based Capacitance Models for Full-Chip Parasitic Extraction.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
pGRASS-Solver: A Parallel Iterative Solver for Scalable Power Grid Analysis Based on Graph Spectral Sparsification.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Advancements and Challenges on Parasitic Extraction for Advanced Process Technologies.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Dynamic Programming Assisted Quantization Approaches for Compressing Normal and Robust DNN Models.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021
2020
IEEE Trans. Image Process., 2020
Floating Random Walk Capacitance Solver Tackling Conformal Dielectric With On-the-Fly Sampling on Eight-Octant Transition Cubes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Reliable Macromodel Generation for the Capacitance Extraction Based on Macromodel-Aware Random Walk Algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Introduction to special issue of 2019 China Semiconductor Technology International Conference (CSTIC) Symposium on Design and Automation of Circuits and Systems.
Integr., 2020
Proceedings of the 32nd IEEE International Conference on Tools with Artificial Intelligence, 2020
Floating Random Walk Based Capacitance Solver for VLSI Structures with Non-Stratified Dielectrics.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
Revisiting Kac's method: A Monte Carlo algorithm for solving the Telegrapher's equations.
Math. Comput. Simul., 2019
Proceedings of the Advances in Knowledge Discovery and Data Mining, 2019
A Unified Approximation Framework for Compressing and Accelerating Deep Neural Networks.
Proceedings of the 31st IEEE International Conference on Tools with Artificial Intelligence, 2019
Structural Parameters Optimization and Grey Relational Analysis in Honeycomb Spiral Heat Exchangers.
Proceedings of the Advances in Natural Computation, Fuzzy Systems and Knowledge Discovery - Proceedings of the 15th International Conference on Natural Computation, Fuzzy Systems and Knowledge Discovery (ICNC-FSKD 2019), Kunming, China, July 20-22, 2019, 2019
Proceedings of the Advances in Database Technology, 2019
Realizing Reproducible and Reusable Parallel Floating Random Walk Solvers for Practical Usage.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Floating Random Walk-Based Capacitance Simulation Considering General Floating Metals.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Efficient Randomized Algorithms for the Fixed-Precision Low-Rank Matrix Approximation.
SIAM J. Matrix Anal. Appl., 2018
Computing Low-Rank Approximations of Large-Scale Matrices with the Tensor Network Randomized SVD.
SIAM J. Matrix Anal. Appl., 2018
Fast and Accurate Tensor Completion with Tensor Trains: A System Identification Approach.
CoRR, 2018
Proceedings of the 2018 International Joint Conference on Neural Networks, 2018
Proceedings of the IEEE 30th International Conference on Tools with Artificial Intelligence, 2018
A Distributed Parallel Random Walk Algorithm for Large-Scale Capacitance Extraction and Simulation.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Proceedings of The 10th Asian Conference on Machine Learning, 2018
2017
Floating Random Walk-Based Capacitance Extraction for General Non-Manhattan Conductor Structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Demand-Side Management of Domestic Electric Water Heaters Using Approximate Dynamic Programming.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
A Fast Implementation of Singular Value Thresholding Algorithm using Recycling Rank Revealing Randomized Singular Value Decomposition.
CoRR, 2017
Proceedings of the Twenty-Sixth International Joint Conference on Artificial Intelligence, 2017
Efficient algorithms for resistance and capacitance calculation problems in the design of flat panel display: [Invited paper].
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
Simulation Algorithms With Exponential Integration for Time-Domain Analysis of Large-Scale Power Delivery Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
A Rank Revealing Randomized Singular Value Decomposition (R3SVD) Algorithm for Low-rank Matrix Approximations.
CoRR, 2016
Efficient randomized algorithms for adaptive low-rank factorizations of large matrices.
CoRR, 2016
A Parallel Random Walk Solver for the Capacitance Calculation Problem in Touchscreen Design.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Parallel Thermal Analysis of 3-D Integrated Circuits With Liquid Cooling on CPU-GPU Platforms.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Fast Random Walk Based Capacitance Extraction for the 3-D IC Structures With Cylindrical Inter-Tier-Vias.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Simulation Algorithms with Exponential Integration for Time-Domain Analysis of Large-Scale Power Delivery Networks.
CoRR, 2015
An algorithmic framework for efficient large-scale circuit simulation using exponential integrators.
Proceedings of the 52nd Annual Design Automation Conference, 2015
2014
Random walk based capacitance extraction for 3D ICs with cylindrical inter-tier-vias.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Efficient techniques for the capacitance extraction of chip-scale VLSI interconnects using floating random walk algorithm.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Efficient Space Management Techniques for Large-Scale Interconnect Capacitance Extraction With Floating Random Walks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
RWCap: A Floating Random Walk Solver for 3-D Capacitance Extraction of Very-Large-Scale Integration Interconnects.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Fast 3-D Thermal Simulation for Integrated Circuits With Domain Decomposition Method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Accelerated floating random walk algorithm for the electrostatic computation with 3-D rectilinear-shaped conductors.
Simul. Model. Pract. Theory, 2013
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
GPU-friendly floating random walk algorithm for capacitance extraction of VLSI interconnects.
Proceedings of the Design, Automation and Test in Europe, 2013
Analytical model of the coupling capacitance between cylindrical through silicon via and horizontal interconnect in 3D IC.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
RWCap2: Advanced floating random walk solver for the capacitance extraction of VLSI interconnects.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2012
Efficient statistical capacitance extraction of nanometer interconnects considering the on-chip line edge roughness.
Microelectron. Reliab., 2012
Efficient variation-aware EM-semiconductor coupled solver for the TSV structures in 3D IC.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Fast floating random walk algorithm formulti-dielectric capacitance extraction with numerical characterization of Green's functions.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
PhD thesis, 2011
Parallel statistical capacitance extraction of on-chip interconnects with an improved geometric variation model.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Numerical characterization of multi-dielectric green's function for floating random walk based capacitance extraction.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
Efficient floating random walk algorithm for interconnect capacitance extraction considering multiple dielectrics.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
An efficient solver for statistical capacitance extraction considering random process variations.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2010
Variational Capacitance Extraction and Modeling Based on Orthogonal Polynomial Method.
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the Simulating Complex Systems by Cellular Automata, 2010
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Efficient Partial Reluctance Extraction for Large-Scale Regular Power Grid Structures.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
Accurate Eye Diagram Prediction Based on Step Response and Its Application to Low-Power Equalizer Design.
IEICE Trans. Electron., 2009
Proceedings of the 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Variational capacitance extraction of on-chip interconnects based on continuous surface model.
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
Efficient Extraction of Frequency-Dependent Substrate Parasitics Using Direct Boundary Element Method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the 45th Design Automation Conference, 2008
Efficient techniques for 3-D impedance extraction using mixed boundary element method.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
A New Boundary Element Method for Multiple-Frequency Parameter Extraction of Lossy Substrates.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
Efficient 3-D extraction of interconnect capacitance considering floating metal fills with boundary element method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Efficient Direct Boundary Element Method for Resistance Extraction of Substrate With Arbitrary Doping Profile.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
A Mixed Boundary Element Method for Extracting Frequency- Inductances of 3D Interconnects.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
An efficient algorithm for 3-D reluctance extraction considering high frequency effect.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
A new boundary element method for accurate modeling of lossy substrates with arbitrary doping profiles.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
IEICE Trans. Electron., 2005
An improved direct boundary element method for substrate coupling resistance extraction.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Fast and accurate extraction of 3-D interconnect resistance: improved quasi-multiple medium accelerated BEM method.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Enhanced QMM-BEM Solver for 3-D Finite-Domain Capacitance Extraction with Multilayered Dielectrics.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
2001
An efficient quasi-multiple medium algorithm fo the capacitance extraction of actual 3-D VLSI interconnects.
Proceedings of ASP-DAC 2001, 2001
1998
Proceedings of the 5th International Conference on Spoken Language Processing, Incorporating The 7th Australian International Speech Science and Technology Conference, Sydney Convention Centre, Sydney, Australia, 30th November, 1998