Toshiyuki Shibuya

According to our database, Toshiyuki Shibuya authored at least 18 papers between 1990 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2019

Foreword.

Toshiyuki Shibuya

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Conference Reports: Recap of the 24th Asia and South Pacific Design Automation Conference.

Toshiyuki Shibuya

IEEE Des. Test, 2019

2013

A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS.

Samir Parikh, Tony Kao, Yasuo Hidaka, Jian Jiang, Asako Toda, Scott McLeod, William W. Walker, Yoichi Koyanagi, Toshiyuki Shibuya, Jun Yamada

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2011

A New Strategy for Simultaneous Escape Based on Boundary Routing.

Lijuan Luo, Tan Yan, Qiang Ma, Martin D. F. Wong, Toshiyuki Shibuya

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

A 4-channel 10.3Gb/s transceiver with adaptive phase equalizer for 4-to-41dB loss PCB channel.

Yasuo Hidaka, Takeshi Horie, Yoichi Koyanagi, Takashi Miyoshi, Hideki Osone, Samir Parikh, Subodh M. Reddy, Toshiyuki Shibuya, Yasushi Umezawa, William W. Walker

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

"Condition-based" dummy fill insertion method based on ECP and CMP predictive models.

Izumi Nitta, Yuji Kanazawa, Daisuke Fukuda, Toshiyuki Shibuya, Naoki Idani, Masaru Ito, Osamu Yamasaki, Norihiro Harada, Takanori Hiramoto

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

B-escape: a simultaneous escape routing algorithm based on boundary routing.

Lijuan Luo, Tan Yan, Qiang Ma, Martin D. F. Wong, Toshiyuki Shibuya

Proceedings of the 2010 International Symposium on Physical Design, 2010

Generation of yield-embedded Pareto-front for simultaneous optimization of yield and performances.

Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya, Yuzi Kanazawa

Proceedings of the 47th Design Automation Conference, 2010

2009

Efficient Power Network Analysis Considering Multidomain Clock Gating.

Wanping Zhang, Wenjian Yu, Xiang Hu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Find the 'Best' Solution from Multiple Analog Topologies via Pareto-Optimality.

Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

Efficiently finding the 'best' solution with multi-objectives from multiple topologies in topology library of analog circuit.

Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network.

Wanping Zhang, Yi Zhu, Wenjian Yu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, Chung-Kuan Cheng

Proceedings of the Design, Automation and Test in Europe, 2008

Non-Gaussian Statistical Timing models of die-to-die and within-die parameter variations for full chip analysis.

Katsumi Homma, Izumi Nitta, Toshiyuki Shibuya

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

Fast power network analysis with multiple clock domains.

Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng

Proceedings of the 25th International Conference on Computer Design, 2007

2005

Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies?

Chung-Kuan Cheng, Steve Lin, Andrew B. Kahng, Keh-Jeng Chang, Vijay Pitchumani, Toshiyuki Shibuya, Roberto Suaya, Zhiping Yu, Fook-Luen Heng, Don MacMillen

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2003

PDL: A New Physical Synthesis Methodology.

Toshiyuki Shibuya, Rajeev Murgai, Tadashi Konno, Kazuhiro Emi, Kaoru Kawamura

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

1997

Large scale circuit partitioning with loose/stable net removal and signal flow based clustering.

Jason Cong, Honching Peter Li, Sung Kyu Lim, Toshiyuki Shibuya, Dongmin Xu

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1990

Touch and Cross Router.

Kaoru Kawamura, Tatsuya Shindo, Toshiyuki Shibuya, Hideki Miwatari, Yoshie Ohki

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990