Sankaran M. Menon

According to our database, Sankaran M. Menon authored at least 17 papers between 1991 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

Special Session: Closed Chassis Platform Debug of Compute Systems using the Functional Ubiquitous USB Type-C Receptacle.

Sankaran M. Menon, Rolf Kühnis

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

2019

Techniques for Debug of Low Power SoCs.

Sankaran M. Menon, Ashish Gupta, Chinna Prudvi, Rolf Kühnis, Sukhbinder Singh Takhar, Spencer K. Millican, Eric Rentschler, Pandy Kalimuthu, Preeti Ranjan Panda, Priyadarsan Patra

Proceedings of the 20th International Workshop on Microprocessor/SoC Test, 2019

1997

Operational and Test Performance in the Presence of Built-in Current Sensors.

Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Carol Q. Tong

VLSI Design, 1997

Input Pattern Classification for Detection of Stuck-ON and Bridging Faults Using I_DDQ Testing in BiCMOS and CMOS Circuits.

Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

1996

Fault Modeling of ECL for High Fault Coverage of Physical Defects.

Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana

VLSI Design, 1996

Input Pattern Classification for Transistor Level Testing of Bridging Faults in BiCMOS Circuits.

Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995

Testable design of BiCMOS circuits for stuck-open fault detection using single patterns.

Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Rochit Rajsuman

IEEE J. Solid State Circuits, August, 1995

A Novel High-Speed BiCMOS Domino Logic Family.

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

Resolution Enhancement in I_DDQ Testing for Large ICs.

Yashwant K. Malaiya, Anura P. Jayasumana, Carol Q. Tong, Sankaran M. Menon

VLSI Design, 1994

Input pattern classification for transistor level testing of BiCMOS circuits.

Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

The Effect of Built-In Current Sensors (BICS) on Operational and Test Performance.

Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Carol Q. Tong

Proceedings of the Seventh International Conference on VLSI Design, 1994

1993

Testable design for BiCMOS stuck-open fault detection.

Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

Test Generation for BiCMOS Circuits.

Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992

Behavior of faulty single BJT BiCMOS logic gates.

Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana

Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992

On Bridging Faults in ECL Circuits.

Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya

Proceedings of the Fifth International Conference on VLSI Design, 1992

1991

Enhancement of resolution in supply current based testing for large ICs.

Yashwant K. Malaiya, Anura P. Jayasumana, Qiao Tong, Sankaran M. Menon

Proceedings of the 9th IEEE VLSI Test Symposium (VTS'91), 1991

Gate level representation of ECL circuits for fault modeling.

Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya

Proceedings of the First Great Lakes Symposium on VLSI, 1991