Sarala Paliwal

According to our database, Sarala Paliwal authored at least 4 papers between 1999 and 2003.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2003

SEAS: a system for early analysis of SoCs.

Reinaldo A. Bergamaschi, Youngsoo Shin, Nagu R. Dhanwada, Subhrajit Bhattacharya, William E. Dougherty, Indira Nair, John A. Darringer, Sarala Paliwal

Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

2000

Design and implementation of a parallel automatic test pattern generation algorithm with low test vector count.

Robert Butler, Brion L. Keller, Sarala Paliwal, Richard Schoonover, Joseph Swenton

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Effective parallel processing techniques for the generation of test data for a logic built-in self test system.

Paul Chang, Brion L. Keller, Sarala Paliwal

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

1999

Design and Implementation of a Parallel Weighted Random Pattern and Logic Built in Self Test Algorithm.

Paul Chang, Brion L. Keller, Sarala Paliwal

Proceedings of the IEEE International Conference On Computer Design, 1999