Joe Swenton

According to our database1, Joe Swenton authored at least 13 papers between 1998 and 2024.

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Bibliography

2024
Cell-Aware Test on Various Circuits in an Advanced 3-nm Technology.
IEEE Des. Test, 2024

2021
Reducing Library Characterization Time for Cell-aware Test while Maintaining Test Quality.
J. Electron. Test., 2021

Speeding up Cell-Aware Library Characterization by Preceding Simulation with Structural Analysis.
Proceedings of the 26th IEEE European Test Symposium, 2021

2020
Tightening the Mesh Size of the Cell-Aware ATPG Net for Catching All Detectable Weakest Faults.
Proceedings of the IEEE European Test Symposium, 2020

2019
Defect-Location Identification for Cell-Aware Test.
Proceedings of the IEEE Latin American Test Symposium, 2019

Application of Cell-Aware Test on an Advanced 3nm CMOS Technology Library.
Proceedings of the IEEE International Test Conference, 2019

Optimization of Cell-Aware ATPG Results by Manipulating Library Cells' Defect Detection Matrices.
Proceedings of the IEEE International Test Conference in Asia, 2019

2018
Improving Diagnosis Resolution and Performance at High Compression Ratios.
Proceedings of the IEEE International Test Conference, 2018

2017
High throughput multiple device diagnosis system.
Proceedings of the IEEE International Test Conference, 2017

2015
A Novel Failure Diagnosis Approach for Low Pin Count and Low Power Compression Architectures.
Proceedings of the 24th IEEE North Atlantic Test Workshop, 2015

2000
Design and implementation of a parallel automatic test pattern generation algorithm with low test vector count.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1999
A Simplified Method for Testing the IBM Pipeline Partial-Scan Microprocessor.
Proceedings of the 8th Asian Test Symposium (ATS '99), 1999

1998
ATPG in practical and non-traditional applications.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998


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