Satoshi Kawashima

According to our database, Satoshi Kawashima authored at least 2 papers between 2015 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A 2.2 GHz -242dB-FOM 4.2 mW ADC-PLL Using Digital Sub-Sampling Architecture.

Teerachot Siriburanon, Satoshi Kondo, Kento Kimura, Tomohiro Ueno, Satoshi Kawashima, Tohru Kaneko, Wei Deng, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa

IEEE J. Solid State Circuits, 2016

2015

25.2 A 2.2GHz -242dB-FOM 4.2mW ADC-PLL using digital sub-sampling architecture.

Teerachot Siriburanon, Satoshi Kondo, Kento Kimura, Tomohiro Ueno, Satoshi Kawashima, Tohru Kaneko, Wei Deng, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015