Sean Blanchard

According to our database1, Sean Blanchard authored at least 33 papers between 2011 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

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Bibliography

2021
Thermal neutrons: a possible threat for supercomputer reliability.
J. Supercomput., 2021

Quantifying Server Memory Frequency Margin and Using It to Improve Performance in HPC Systems.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

Understanding the Effects of DRAM Correctable Error Logging at Scale.
Proceedings of the IEEE International Conference on Cluster Computing, 2021

2020
Thermal Neutrons: a Possible Threat for Supercomputers and Safety Critical Applications.
Proceedings of the IEEE European Test Symposium, 2020

An Overview of the Risk Posed by Thermal Neutrons to the Reliability of Computing Devices.
Proceedings of the 50th Annual IEEE-IFIP International Conference on Dependable Systems and Networks, 2020

2019
Do Solar Proton Events Reduce the Number of Faults in Supercomputers?: A Comparative Analysis of Faults During and without Solar Proton Events.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Topology-Aware Event Sequence Mining for Understanding HPC System Behavior and Detecting Anomalies.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

2018
Using virtualization to quantify power conservation via near-threshold voltage reduction for inherently resilient applications.
Parallel Comput., 2018

Improving Application Resilience by Extending Error Correction with Contextual Information.
Proceedings of the IEEE/ACM 8th Workshop on Fault Tolerance for HPC at eXtreme Scale, 2018

SaNSA - The Supercomputer and Node State Architecture.
Proceedings of the IEEE/ACM 8th Workshop on Fault Tolerance for HPC at eXtreme Scale, 2018

Enhancing HPC System Log Analysis by Identifying Message Origin in Source Code.
Proceedings of the 2018 IEEE International Symposium on Software Reliability Engineering Workshops, 2018

Event Block Identification and Analysis for Effective Anomaly Detection to Build Reliable HPC Systems.
Proceedings of the 20th IEEE International Conference on High Performance Computing and Communications; 16th IEEE International Conference on Smart City; 4th IEEE International Conference on Data Science and Systems, 2018

Physics-Informed Machine Learning for DRAM Error Modeling.
Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

Converting Unstructured System Logs into Structured Event List for Anomaly Detection.
Proceedings of the 13th International Conference on Availability, Reliability and Security, 2018

2017
Addressing statistical significance of fault injection: empirical studies of the soft error susceptibility.
Int. J. High Perform. Comput. Netw., 2017

Experimental and analytical study of Xeon Phi reliability.
Proceedings of the International Conference for High Performance Computing, 2017

Silent Data Corruption Resilient Two-sided Matrix Factorizations.
Proceedings of the 22nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2017

RSVP: Soft Error Resilient Power Savings at Near-Threshold Voltage Using Register Vulnerability.
Proceedings of the 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2017

2016
Design, Use and Evaluation of P-FSEFI: A Parallel Soft Error Fault Injection Framework for Emulating Soft Errors in Parallel Applications.
Proceedings of the 9th EAI International Conference on Simulation Tools and Techniques, 2016

Relational Synthesis of Text and Numeric Data for Anomaly Detection on Computing System Logs.
Proceedings of the 15th IEEE International Conference on Machine Learning and Applications, 2016

Towards Practical Algorithm Based Fault Tolerance in Dense Linear Algebra.
Proceedings of the 25th ACM International Symposium on High-Performance Parallel and Distributed Computing, 2016

SDC is in the Eye of the Beholder: A Survey and Preliminary Study.
Proceedings of the 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2016

2015
Field, experimental, and analytical data on large-scale HPC systems and evaluation of the implications for exascale system design.
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Empirical Studies of the Soft Error Susceptibility ofSorting Algorithms to Statistical Fault Injection.
Proceedings of the 5th Workshop on Fault Tolerance for HPC at eXtreme Scale, 2015

Memory Errors in Modern Systems: The Good, The Bad, and The Ugly.
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014
F-SEFI: A Fine-Grained Soft Error Fault Injection Tool for Profiling Application Vulnerability.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Harnessing Unreliable Cores in Heterogeneous Architecture: The PyDac Programming Model and Runtime.
Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2014

2013
Feng shui of supercomputer memory: positional effects in DRAM and SRAM faults.
Proceedings of the International Conference for High Performance Computing, 2013

Analyzing Reliability of Memory Sub-systems with Double-Chipkill Detect/Correct.
Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

Exploring Time and Frequency Domains for Accurate and Automated Anomaly Detection in Cloud Computing Systems.
Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

PyDac: A Resilient Run-Time Framework for Divide-and-Conquer Applications on a Heterogeneous Many-Core Architecture.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

GPU Behavior on a Large HPC Cluster.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

2011
Experimental Framework for Injecting Logic Errors in a Virtual Machine to Profile Applications for Soft Error Resilience.
Proceedings of the Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29, 2011


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