Sudhanva Gurumurthi

According to our database1, Sudhanva Gurumurthi authored at least 55 papers between 2001 and 2019.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Kleio: A Hybrid Memory Page Scheduler with Machine Intelligence.
Proceedings of the 28th International Symposium on High-Performance Parallel and Distributed Computing, 2019

2018
Challenges of High-Capacity DRAM Stacks and Potential Directions.
Proceedings of the Workshop on Memory Centric High Performance Computing, 2018

Evaluating the Resilience of Parallel Applications.
Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

2016
A Systematic Methodology for Evaluating the Error Resilience of GPGPU Applications.
IEEE Trans. Parallel Distrib. Syst., 2016

ePVF: An Enhanced Program Vulnerability Factor Methodology for Cross-Layer Resilience Analysis.
Proceedings of the 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2016

2015
Achieving Exascale Capabilities through Heterogeneous Computing.
IEEE Micro, 2015

Failures in Large-Scale Systems: Insights from the Field.
Proceedings of the 5th Workshop on Fault Tolerance for HPC at eXtreme Scale, 2015

Memory Errors in Modern Systems: The Good, The Bad, and The Ugly.
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014
Soft Failures in Large Datacenters.
Computer Architecture Letters, 2014

Calculating Architectural Vulnerability Factors for Spatial Multi-Bit Transient Faults.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

GPU-Qin: A methodology for evaluating the error resilience of GPGPU applications.
Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014

Real-world design and evaluation of compiler-managed GPU redundant multithreading.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

Evaluating the Error Resilience of Parallel Programs.
Proceedings of the 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2014

GPGPUs: How to combine high computational power with high reliability.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Power availability provisioning in large data centers.
Proceedings of the Computing Frontiers Conference, CF'14, 2014

2013
Datacenter Scale Evaluation of the Impact of Temperature on Hard Disk Drive Failures.
TOS, 2013

Modeling Power Consumption of NAND Flash Memories Using FlashPower.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2013

Feng shui of supercomputer memory: positional effects in DRAM and SRAM faults.
Proceedings of the International Conference for High Performance Computing, 2013

A Novel Simulation Methodology for Accelerating Reliability Assessment of SSDs.
Proceedings of the 2013 IEEE 21st International Symposium on Modelling, 2013

2012
Dynamic Thermal Management for High-Performance Storage Systems.
Proceedings of the Handbook of Energy-Aware and Green Computing - Two Volume Set., 2012

Enhancing NBTI Recovery in SRAM Arrays Through Recovery Boosting.
IEEE Trans. VLSI Syst., 2012

2011
Phase Change Memory: From Devices to Systems
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, 2011

Modeling and analyzing NBTI in the presence of Process Variation.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Delivering on the promise of universal memory for spin-transfer torque RAM (STT-RAM).
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

The STeTSiMS STT-RAM simulation and modeling system.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Relaxing non-volatility for fast and energy-efficient STT-RAM caches.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

2010
Recovery Boosting: A Technique to Enhance NBTI Recovery in SRAM Arrays.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

How I Learned to Stop Worrying and Love Flash Endurance.
Proceedings of the 2nd USENIX Workshop on Hot Topics in Storage and File Systems, 2010

Accelerating enterprise solid-state disks with non-volatile merge caching.
Proceedings of the International Green Computing Conference 2010, 2010

A multi-level approach to reduce the impact of NBTI on processor functional units.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

FlashPower: A detailed power model for NAND flash memory.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Sensitivity-Based Optimization of Disk Architecture.
IEEE Trans. Computers, 2009

Using Intradisk Parallelism to Build Energy-Efficient Storage Systems.
IEEE Micro, 2009

Balancing soft error coverage with lifetime reliability in redundantly multithreaded processors.
Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009

Differentiating the roles of IR measurement and simulation for power and temperature-aware design.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

2008
Sensitivity Based Power Management of Enterprise Storage Systems.
Proceedings of the 16th International Symposium on Modeling, 2008

Intra-disk Parallelism: An Idea Whose Time Has Come.
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

Active storage revisited: the case for power and performance benefits for unstructured data processing applications.
Proceedings of the 5th Conference on Computing Frontiers, 2008

2007
Should disks be speed demons or brainiacs?
Operating Systems Review, 2007

Dynamic prediction of architectural vulnerability from microarchitectural state.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

SODA: Sensitivity Based Optimization of Disk Architecture.
Proceedings of the 44th Design Automation Conference, 2007

2006
Thermal issues in disk drive design: Challenges and possible solutions.
TOS, 2006

Using STEAM for Thermal Simulation of Storage Systems.
IEEE Micro, 2006

Understanding the performance-temperature interactions in disk I/O of server workloads.
Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006

SlicK: slice-based locality exploitation for efficient redundant multithreading.
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, 2006

2005
Disk Drive Roadmap from the Thermal Perspective: A Case for Dynamic Thermal Management.
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

2004
A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

2003
Reducing Disk Power Consumption in Servers with DRPM.
IEEE Computer, 2003

Interplay of energy and performance for disk arrays running transaction processing workloads.
Proceedings of the 2003 IEEE International Symposium on Performance Analysis of Systems and Software, 2003

DRPM: Dynamic Speed Control for Power Mangagement in Server Class Disks.
Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

ICR: In-Cache Replication for Enhancing Data Cache Reliability.
Proceedings of the 2003 International Conference on Dependable Systems and Networks (DSN 2003), 2003

2002
Energy-performance trade-offs for spatial access methods on memory-resident data.
VLDB J., 2002

Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach.
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002

2001
Analyzing energy behavior of spatial access methods for memory-resident data.
Proceedings of the VLDB 2001, 2001


  Loading...