Seongwook Park

Orcid: 0000-0002-9639-5814

According to our database1, Seongwook Park authored at least 25 papers between 2013 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2017
An Energy-Efficient Speech-Extraction Processor for Robust User Speech Recognition in Mobile Head-Mounted Display Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

2016
An Energy-Efficient Embedded Deep Neural Network Processor for High Speed Visual Attention in Mobile Vision Recognition SoC.
IEEE J. Solid State Circuits, 2016

A 2.71 nJ/Pixel Gaze-Activated Object Recognition System for Low-Power Mobile Smart Glasses.
IEEE J. Solid State Circuits, 2016

Low-power real-time intelligent SoCs for smart machines.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

14.1 A 126.1mW real-time natural UI/UX processor with embedded deep-learning core for low-power smart glasses.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

An 8.3mW 1.6Msamples/s multi-modal event-driven speech enhancement processor for robust speech recognition in smart glasses.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

A 34pJ/level pixel depth-estimation processor with shifter-based pipelined architecture for mobile user interface.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015
An Energy-Efficient and Scalable Deep Learning/Inference Processor With Tetra-Parallel MIMD Architecture for Big Data Applications.
IEEE Trans. Biomed. Circuits Syst., 2015

An Impedance and Multi-Wavelength Near-Infrared Spectroscopy IC for Non-Invasive Blood Glucose Estimation.
IEEE J. Solid State Circuits, 2015

A 1.22 TOPS and 1.52 mW/MHz Augmented Reality Multicore Processor With Neural Network NoC for HMD Applications.
IEEE J. Solid State Circuits, 2015

4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

18.1 A 2.71nJ/pixel 3D-stacked gaze-activated object-recognition system for low-power mobile HMD applications.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 3.13nJ/sample energy-efficient speech extraction processor for robust speech recognition in mobile head-mounted display systems.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 124.9fps memory-efficient hand segmentation processor for hand gesture in mobile devices.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A keypoint-level parallel pipelined object recognition processor with gaze activation image sensor for mobile smart glasses system.
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

A 1.9nJ/pixel embedded deep neural network processor for high speed visual attention in a mobile vision recognition SoC.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014
An Augmented Reality Processor with a Congestion-Aware Network-on-Chip Scheduler.
IEEE Micro, 2014

Electromagnetic Compatibility of Resonance Coupling Wireless Power Transfer in On-Line Electric Vehicle System.
IEICE Trans. Commun., 2014

An impedance and multi-wavelength near-infrared spectroscopy IC for non-invasive blood glucose estimation.
Proceedings of the Symposium on VLSI Circuits, 2014

10.4 A 1.22TOPS and 1.52mW/MHz augmented reality multi-core processor with neural network NoC for HMD applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A 1.5nJ/pixel super-resolution enhanced FAST corner detection processor for high accuracy AR.
Proceedings of the ESSCIRC 2014, 2014

A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip scheduler.
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2013
A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 32.8mW 60fps cortical vision processor for spatio-temporal action recognition.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A multi-granularity parallelism object recognition processor with content-aware fine-grained task scheduling.
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013


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