Kyeongryeol Bong

According to our database1, Kyeongryeol Bong authored at least 35 papers between 2012 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Processor on Domain-Specific Mobile Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

CNNP-v2: An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019

2018
A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector.
IEEE J. Solid State Circuits, 2018

Low-Power Scalable 3-D Face Frontalization Processor for CNN-Based Face Recognition in Mobile Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

2017
Low-Power Convolutional Neural Network Processor for a Face-Recognition System.
IEEE Micro, 2017

A 502-GOPS and 0.984-mW Dual-Mode Intelligent ADAS SoC With Real-Time Semiglobal Matching and Intention Prediction for Smart Automotive Black Box System.
IEEE J. Solid State Circuits, 2017

A 590MDE/s semi-global matching processor with lossless data compression.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

14.6 A 0.62mW ultra-low-power convolutional-neural-network face-recognition processor and a CIS integrated with always-on haar-like face detector.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A 0.53mW ultra-low-power 3D face frontalization processor for face recognition with human-level accuracy in wearable devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A Real-Time and Energy-Efficient Embedded System for Intelligent ADAS with RNN-Based Deep Risk Prediction using Stereo Camera.
Proceedings of the Computer Vision Systems - 11th International Conference, 2017

A 24 μW 38.51 mΩrms resolution bio-impedance sensor with dual path instrumentation amplifier.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

An ultra-low-power and mixed-mode event-driven face detection SoC for always-on mobile applications.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016
A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A 2.71 nJ/Pixel Gaze-Activated Object Recognition System for Low-Power Mobile Smart Glasses.
IEEE J. Solid State Circuits, 2016

A 0.5° Error 10 mW CMOS Image Sensor-Based Gaze Estimation Processor.
IEEE J. Solid State Circuits, 2016

14.2 A 502GOPS and 0.984mW dual-mode ADAS SoC with RNN-FIS engine for intention prediction in automotive black-box system.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

A 43.7 mW 94 fps CMOS image sensor-based stereo matching accelerator with focal-plane rectification and analog census transformation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An intelligent ADAS processor with real-time semi-global matching and intention prediction for 720p stereo vision.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

An energy-efficient parallel multi-core ADAS processor with robust visual attention and workload-prediction DVFS for real-time HD stereo stream.
Proceedings of the 2016 IEEE Symposium in Low-Power and High-Speed Chips, 2016

2015
An Energy-Efficient and Scalable Deep Learning/Inference Processor With Tetra-Parallel MIMD Architecture for Big Data Applications.
IEEE Trans. Biomed. Circuits Syst., 2015

A 1.22 TOPS and 1.52 mW/MHz Augmented Reality Multicore Processor With Neural Network NoC for HMD Applications.
IEEE J. Solid State Circuits, 2015

A 0.5-degree error 10mW CMOS image sensor-based gaze estimation processor with logarithmic processing.
Proceedings of the Symposium on VLSI Circuits, 2015

4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

18.1 A 2.71nJ/pixel 3D-stacked gaze-activated object-recognition system for low-power mobile HMD applications.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A keypoint-level parallel pipelined object recognition processor with gaze activation image sensor for mobile smart glasses system.
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

2014
An Augmented Reality Processor with a Congestion-Aware Network-on-Chip Scheduler.
IEEE Micro, 2014

An 87-mA · min Iontophoresis Controller IC With Dual-Mode Impedance Sensor for Patch-Type Transdermal Drug Delivery System.
IEEE J. Solid State Circuits, 2014

10.4 A 1.22TOPS and 1.52mW/MHz augmented reality multi-core processor with neural network NoC for HMD applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

An 1.61mW mixed-signal column processor for BRISK feature extraction in CMOS image sensor.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip scheduler.
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

Energy-efficient Mixed-mode support vector machine processor with analog Gaussian kernel.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
An 87mA·min iontophoresis controller IC with dual-mode impedance sensor for patch-type transdermal drug delivery system.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A multi-granularity parallelism object recognition processor with content-aware fine-grained task scheduling.
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

2012
Wearable mental-health monitoring platform with independent component analysis and nonlinear chaotic analysis.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012


  Loading...