Jinmook Lee

According to our database1, Jinmook Lee authored at least 23 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
The Development of Silicon for AI: Different Design Approaches.
IEEE Trans. Circuits Syst., 2020

The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices.
IEEE Trans. Circuits Syst., 2020

A 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019
A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision.
IEEE J. Solid State Circuits, 2019

A Full HD 60 fps CNN Super Resolution Processor with Selective Caching based Layer Fusion for Mobile Devices.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 1.32 TOPS/W Energy Efficient Deep Neural Network Learning Processor with Direct Feedback Alignment based Heterogeneous Core Architecture.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
DNPU: An Energy-Efficient Deep-Learning Processor with Heterogeneous Multi-Core Architecture.
IEEE Micro, 2018

Low-Power Scalable 3-D Face Frontalization Processor for CNN-Based Face Recognition in Mobile Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

B-Face: 0.2 MW CNN-Based Face Recognition Processor with Face Alignment for Mobile User Identification.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

UNPU: A 50.6TOPS/W unified deep neural network accelerator with 1b-to-16b fully-variable weight bit-precision.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
An Energy-Efficient Speech-Extraction Processor for Robust User Speech Recognition in Mobile Head-Mounted Display Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

14.2 DNPU: An 8.1TOPS/W reconfigurable CNN-RNN processor for general-purpose deep neural networks.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A 0.53mW ultra-low-power 3D face frontalization processor for face recognition with human-level accuracy in wearable devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

An energy-efficient deep learning processor with heterogeneous multi-core architecture for convolutional neural networks and recurrent neural networks.
Proceedings of the 2017 IEEE Symposium in Low-Power and High-Speed Chips, 2017

A 21mW low-power recurrent neural network accelerator with quantization tables for embedded deep learning applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016
14.1 A 126.1mW real-time natural UI/UX processor with embedded deep-learning core for low-power smart glasses.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

An 8.3mW 1.6Msamples/s multi-modal event-driven speech enhancement processor for robust speech recognition in smart glasses.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
An Energy-Efficient and Scalable Deep Learning/Inference Processor With Tetra-Parallel MIMD Architecture for Big Data Applications.
IEEE Trans. Biomed. Circuits Syst., 2015

4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 3.13nJ/sample energy-efficient speech extraction processor for robust speech recognition in mobile head-mounted display systems.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015


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