Sergio López-Buedo

Orcid: 0000-0002-0815-7921

According to our database1, Sergio López-Buedo authored at least 49 papers between 1995 and 2023.

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Bibliography

2023
Enhancing Conditional Stalling to Boost Performance of Stream-Processing Logic With RAW Dependencies.
IEEE Trans. Circuits Syst. II Express Briefs, July, 2023

2022
Demonstration of latency-aware 5G network slicing on optical metro networks.
JOCN, 2022

Demonstration of latency-aware 5G network slicing on optical metro networks.
CoRR, 2022

2021

2019
Limago: An FPGA-Based Open-Source 100 GbE TCP/IP Stack.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

2018
Understanding PCIe performance for end host networking.
Proceedings of the 2018 Conference of the ACM Special Interest Group on Data Communication, 2018

FPGA-based TCP/IP Checksum Offloading Engine for 100 Gbps Networks.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

dReDBox: Materializing a full-stack rack-scale system prototype of a next-generation disaggregated datacenter.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
A single-FPGA architecture for detecting heavy hitters in 100 Gbit/s ethernet links.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

An FPGA-based approach for packet deduplication in 100 gigabit-per-second networks.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

Diluting the Scalability Boundaries: Exploring the Use of Disaggregated Architectures for High-Level Network Data Analysis.
Proceedings of the 19th IEEE International Conference on High Performance Computing and Communications; 15th IEEE International Conference on Smart City; 3rd IEEE International Conference on Data Science and Systems, 2017

2016
Accurate and affordable packet-train testing systems for multi-gigabit-per-second networks.
IEEE Commun. Mag., 2016

Automated synthesis of FPGA-based packet filters for 100 Gbps network monitoring applications.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

FPGA-based encrypted network traffic identification at 100 Gbit/s.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Harnessing Programmable SoCs to develop cost-effective network quality monitoring devices.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

On interconnecting and orchestrating components in disaggregated data centers: The dReDBox project vision.
Proceedings of the European Conference on Networks and Communications, 2016

Rack-scale disaggregated cloud data centers: The dReDBox project vision.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
A PCIe DMA engine to support the virtualization of 40 Gbps FPGA-accelerated network appliances.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Leveraging open source platforms and high-level synthesis for the design of FPGA-based 10 GbE active network probes.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

2014
Bridging the gap between hardware and software open source network developments.
IEEE Netw., 2014

TNT10G: A high-accuracy 10 GbE traffic player and recorder for multi-Terabyte traces.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

2013
FPGA acceleration using high-level languages of a Monte-Carlo method for pricing complex options.
J. Syst. Archit., 2013

Accurate and flexible flow-based monitoring for high-speed networks.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

IDEALIST control and service management solutions for dynamic and adaptive flexi-grid DWDM networks.
Proceedings of the 2013 Future Network & Mobile Summit, Lisboa, Portugal, July 3-5, 2013, 2013

2012
Virtualization of reconfigurable coprocessors in HPRC systems with multicore architecture.
J. Syst. Archit., 2012

A Convolve-And-MErge Approach for Exact Computations on High-Performance Reconfigurable Computers.
Int. J. Reconfigurable Comput., 2012

A FPGA-based scalable architecture for URL legal filtering in 100GbE networks.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

2011
High-Level Languages and Floating-Point Arithmetic for FPGA-Based CFD Simulations.
IEEE Des. Test Comput., 2011

Characterization of the busy-hour traffic of IP networks based on their intrinsic features.
Comput. Networks, 2011

High-accuracy network monitoring using ETOMIC testbed.
Proceedings of the 7th Conference on Next Generation Internet, 2011

2008
Portable library development for reconfigurable computing systems: A case study.
Parallel Comput., 2008

Implementation of secure applications in self-reconfigurable systems.
Microprocess. Microsystems, 2008

A Framework to Improve IP Portability on Reconfigurable Computers.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

2007
Self-Reconfigurable Embedded Systems on Low-Cost FPGAs.
IEEE Micro, 2007

A Quality of Service Assessment Technique for Large-Scale Management of Multimedia Flows.
Proceedings of the Real-Time Mobile Multimedia Services, 2007

2006
Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2005
Hardware-Accelerated SSH on Self-Reconfigurable Systems.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

2004
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003
Using Partial Reconfiguration in Cryptographic Applications: An Implementation of the IDEA Algorithm.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
Low-Power FSMs in FPGA: Encoding Alternatives.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

A Tool for Activity Estimation in FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2002

FSM Decomposition for Low Power in FPGA.
Proceedings of the Field-Programmable Logic and Applications, 2002

Run-Time Reconfiguration to Check Temperature in Custom Computers: An Application of JBits Technology.
Proceedings of the Field-Programmable Logic and Applications, 2002

2000
Thermal Testing on Reconfigurable Computers.
IEEE Des. Test Comput., 2000

A biologically inspired autonomous robot that learns approach-avoidance behaviors.
Proceedings of the Fourth International Conference on Autonomous Agents, 2000

1998
Some experiments about wave pipelining on FPGA's.
IEEE Trans. Very Large Scale Integr. Syst., 1998

1997
Thermal monitoring on FPGAs using ring-oscillators.
Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

1996
The Wave Pipeline Effect on LUT-Based FPGA Architectures.
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996

1995
Some Notes on Power Management on FPGA-Based Systems.
Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995


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