Sergio Pesenti

According to our database1, Sergio Pesenti authored at least 2 papers between 2008 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2008
Reducing the Number of Comparators in Multibt Delta Sigma Modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008


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