Andrew Stewart

According to our database1, Andrew Stewart authored at least 12 papers between 2004 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET.
IEEE J. Solid State Circuits, 2020


2019
Deep Probabilistic Surrogate Networks for Universal Simulator Approximation.
CoRR, 2019


2018
A utilitarian re-examination of enterprise-scale information security management.
Inf. Comput. Secur., 2018

2017
Modality Differences in Timing: Testing the Pacemaker Speed Explanation.
Proceedings of the 39th Annual Meeting of the Cognitive Science Society, 2017

2016
10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014
26.3 A pin- and power-efficient low-latency 8-to-12Gb/s/wire 8b8w-coded SerDes link for high-loss channels in 40nm technology.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012
Can spending on information security be justified? Evaluating the security spending decision from the perspective of a rational actor.
Inf. Manag. Comput. Secur., 2012

2006
Efficient visualization of change events in enterprise networks.
Proceedings of the Second International Conference on Security and Privacy in Communication Networks and the Workshops, 2006

2005
Information security technologies as a commodity input.
Inf. Manag. Comput. Security, 2005

2004
On risk: perception and direction.
Comput. Secur., 2004


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