Seryeong Yoon

According to our database, Seryeong Yoon authored at least 2 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A Single-Ended Offset-Compensating Bit-Line Sense-Amplifier with Ground Precharge and Charge Transfer Pre sensing for Sub-1V DRAM.

Changyoung Lee, Youngseok Park, Hyunchul Yoon, Seryeong Yoon, Donggeon Kim, Bokyeon Won, Junhwa Song, In-Jae Bae, Jaejoon Song, Kyuchang Kang, Jaehyuk Kim, Kyungrak Cho, Incheol Nam, Jungdon Ihm, Young-Hun Seo, Changsik Yoo, Sang Jun Hwang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024

2022

A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process.

Dae-Hyun Kim, Byungkyu Song, Hyun-A. Ahn, Woongjoon Ko, Sung-Geun Do, Seokjin Cho, Kihan Kim, Seung-Hoon Oh, Hye-Yoon Joo, Geuntae Park, Jin-Hun Jang, Yong-Hun Kim, Donghun Lee, Jaehoon Jung, Yongmin Kwon, Youngjae Kim, Jaewoo Jung, Seongil O, Seoulmin Lee, Jaeseong Lim, Junho Son, Jisu Min, Haebin Do, Jaejun Yoon, Isak Hwang, Jinsol Park, Hong Shim, Seryeong Yoon, Dongyeong Choi, Jihoon Lee, Soohan Woo, Eunki Hong, Junha Choi, Jae-Sung Kim, Sangkeun Han, Jong-Min Bang, Bokgue Park, Jang-Hoo Kim, Seouk-Kyu Choi, Gong-Heum Han, Yoo-Chang Sung, Wonil Bae, Jeong-Don Lim, Seungjae Lee, Changsik Yoo, Sang Joon Hwang, Jooyoung Lee

Proceedings of the IEEE International Solid-State Circuits Conference, 2022