Byungkyu Song

According to our database1, Byungkyu Song authored at least 18 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
A Sneak Current Compensation Scheme With Offset Cancellation Sensing Circuit for ReRAM-Based Cross-Point Memory Array.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022


2021
Environmental-Variation-Tolerant Magnetic Tunnel Junction-Based Physical Unclonable Function Cell With Auto Write-Back Technique.
IEEE Trans. Inf. Forensics Secur., 2021

Imbalance-Tolerant Bit-Line Sense Amplifier for Dummy-Less Open Bit-Line Scheme in DRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Self-Referenced Single-Ended Resistance Monitoring Write Termination Scheme for STT-RAM Write Energy Reduction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020
Highly Independent MTJ-Based PUF System Using Diode-Connected Transistor and Two-Step Postprocessing for Improved Response Stability.
IEEE Trans. Inf. Forensics Secur., 2020

2019
Offset-Canceling Single-Ended Sensing Scheme With One-Bit-Line Precharge Architecture for Resistive Nonvolatile Memory in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Sensing Margin Enhancement Technique Utilizing Boosted Reference Voltage for Low-Voltage and High-Density DRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2019

A Decoder for Short BCH Codes With High Decoding Efficiency and Low Power for Emerging Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Offset-Cancellation Sensing-Circuit-Based Nonvolatile Flip-Flop Operating in Near-Threshold Voltage Region.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
Data-Cell-Variation-Tolerant Dual-Mode Sensing Scheme for Deep Submicrometer STT-RAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

2017
A 10T-4MTJ Nonvolatile Ternary CAM Cell for Reliable Search Operation and a Compact Area.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS.
IEEE J. Solid State Circuits, 2017

2016
An Offset-Tolerant Dual-Reference-Voltage Sensing Scheme for Deep Submicrometer STT-RAM.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Equalization scheme analysis for high-density spin transfer torque random access memory.
Proceedings of the International SoC Design Conference, 2016

2015
Latch Offset Cancellation Sense Amplifier for Deep Submicrometer STT-RAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Reference-circuit analysis for high-bandwidth spin transfer torque random access memory.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015


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