Hyun-A. Ahn
Orcid: 0000-0001-9600-2139
According to our database1,
Hyun-A. Ahn
authored at least 5 papers
between 2016 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
A 1.01V 8.5Gb/s/pin 16Gb LPDDR5x SDRAM with Self-Pre-Emphasized Stacked-Tx, Supply Voltage Insensitive Rx, and Optimized Clock Using 4th-Generation 10nm DRAM Process for High-Speed and Low-Power Applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2020
A Driving and Compensation Method for AMLED Displays Using Adaptive Reference Generator for High Luminance Uniformity.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
2018
An Active Matrix Micro-Pixelated LED Display Driver for High Luminance Uniformity Using Resistance Mismatch Compensation Method.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
2016
A Fast Switching Current Regulator Using Slewing Time Reduction Method for High Dimming Ratio of LED Backlight Drivers.
IEEE Trans. Circuits Syst. II Express Briefs, 2016