Jong-Min Bang
According to our database1,
Jong-Min Bang
authored at least 4 papers
between 2011 and 2022.
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Bibliography
2022
A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2017
23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2012
A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based Stacking.
IEEE J. Solid State Circuits, 2012
2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011