Shankar Ganesh Ramasubramanian

Orcid: 0000-0003-3938-9052

According to our database1, Shankar Ganesh Ramasubramanian authored at least 6 papers between 2013 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Minimal Aliasing Single-Error-Correction Codes for DRAM Reliability Improvement.
IEEE Access, 2021

2019
Automatic Synthesis Techniques for Approximate Circuits.
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019

2015
DyReCTape: a <u>dy</u>namically <u>re</u>configurable <u>c</u>ache using domain wall memory <u>tape</u>s.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

STAG: Spintronic-Tape Architecture for GPGPU cache hierarchies.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

2013
Relax-and-retime: a methodology for energy-efficient recovery based design.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013


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