Vivek Joy Kozhikkottu

According to our database, Vivek Joy Kozhikkottu authored at least 10 papers between 2011 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Minimal Aliasing Single-Error-Correction Codes for DRAM Reliability Improvement.

Sung-Il Pae, Vivek Joy Kozhikkottu, Dinesh Somasekar, Wei Wu, Shankar Ganesh Ramasubramanian, Melin Dadual, Hyungmin Cho, Kon-Woo Kwon

IEEE Access, 2021

2020

Logic Synthesis of Approximate Circuits.

Swagath Venkataramani, Vivek Joy Kozhikkottu, Amit Sabne, Kaushik Roy, Anand Raghunathan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2016

Emulation-Based Analysis of System-on-Chip Performance Under Variations.

Vivek Joy Kozhikkottu, Rangharajan Venkatesan, Anand Raghunathan, Sujit Dey

IEEE Trans. Very Large Scale Integr. Syst., 2016

Cache Design with Domain Wall Memory.

Rangharajan Venkatesan, Vivek Joy Kozhikkottu, Mrigank Sharad, Charles Augustine, Arijit Raychowdhury, Kaushik Roy, Anand Raghunathan

IEEE Trans. Computers, 2016

2014

Variation tolerant design of a vector processor for recognition, mining and synthesis.

Vivek Joy Kozhikkottu, Swagath Venkataramani, Sujit Dey, Anand Raghunathan

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Variation Aware Cache Partitioning for Multithreaded Programs.

Vivek Joy Kozhikkottu, Abhisek Pan, Vijay S. Pai, Sujit Dey, Anand Raghunathan

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2012

TapeCache: a high density, energy efficient cache based on domain wall memory.

Rangharajan Venkatesan, Vivek Joy Kozhikkottu, Charles Augustine, Arijit Raychowdhury, Kaushik Roy, Anand Raghunathan

Proceedings of the International Symposium on Low Power Electronics and Design, 2012

SALSA: systematic logic synthesis of approximate circuits.

Swagath Venkataramani, Amit Sabne, Vivek Joy Kozhikkottu, Kaushik Roy, Anand Raghunathan

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Recovery-based design for variation-tolerant SoCs.

Vivek Joy Kozhikkottu, Sujit Dey, Anand Raghunathan

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

VESPA: Variability emulation for System-on-Chip performance analysis.

Vivek Joy Kozhikkottu, Rangharajan Venkatesan, Anand Raghunathan, Sujit Dey

Proceedings of the Design, Automation and Test in Europe, 2011