Sridhar Narayanan

According to our database1, Sridhar Narayanan authored at least 17 papers between 1992 and 2017.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Keynote address tribute to Professor Mel Breuer: Contributions to CAD and Test.
Proceedings of the 35th IEEE VLSI Test Symposium, 2017

2015
Position Effects in Search Advertising and their Moderators: A Regression Discontinuity Approach.
Mark. Sci., 2015

2011
Identifying Causal Marketing Mix Effects Using a Regression Discontinuity Design.
Mark. Sci., 2011

2009
Heterogeneous Learning and the Targeting of Marketing Communication for New Products.
Mark. Sci., 2009

2005
IODINE: a tool to automatically infer dynamic invariants for hardware designs.
Proceedings of the 42nd Design Automation Conference, 2005

2004
TSOtool: A Program for Verifying Memory Systems Using the Memory Consistency Model.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

2002
Implementation of a third-generation 1.1-GHz 64-bit microprocessor.
IEEE J. Solid State Circuits, 2002

1997
An Efficient Scheme to Diagnose Scan Chains.
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

A fault diagnosis methodology for the UltraSPARC<sup>TM</sup>-I microprocessor.
Proceedings of the European Design and Test Conference, 1997

1995
Reconfiguration techniques for a single scan chain.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Asynchronous multiple scan chain.
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Testability, Debuggability, and Manufacturability Features of the UltraSPARC<sup>TM</sup>-I Microprocessor.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1993
Optimal Configuring of Multiple Scan Chains.
IEEE Trans. Computers, 1993

Reconfigurable scan chains: a novel approach to reduce test application time.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992
Optimal Sequencing of Scan Registers.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

Configuring multiple scan chains for minimum test time.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

SIESTA: a multi-facet scan design system.
Proceedings of the conference on European design automation, 1992


  Loading...