Stefan Frehse

According to our database1, Stefan Frehse authored at least 19 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2017
metaSMT: focus on your application and not on solver integration.
Int. J. Softw. Tools Technol. Transf., 2017

Enhancing robustness of sequential circuits using application-specific knowledge and formal methods.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2013
Quality and quantity in robustness checking using formal techniques.
PhD thesis, 2013

Improving fault tolerance utilizing hardware-software-co-synthesis.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
RevKit: A Toolkit for Reversible Circuit Design.
J. Multiple Valued Log. Soft Comput., 2012

Complete and effective robustness checking by means of interpolation.
Proceedings of the Formal Methods in Computer-Aided Design, 2012

2011
Effective Robustness Analysis Using Bounded Model Checking Techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Debugging reversible circuits.
Integr., 2011

RevKit: An Open Source Toolkit for the Design of Reversible Circuits.
Proceedings of the Reversible Computation - Third International Workshop, 2011

metaSMT: Focus on Your Application not on Solver Integration.
Proceedings of the First International Workshop on Design and Implementation of Formal Tools and Systems, 2011

Determining minimal testsets for reversible circuits using Boolean satisfiability.
Proceedings of the AFRICON 2011, 2011

2010
Automatische formale Verifikation der Fehlertoleranz von Schaltkreisen (Automated Formal Verification of Fault Tolerance for Circuits).
it Inf. Technol., 2010

Efficient Simulation-Based Debugging of Reversible Logic.
Proceedings of the 40th IEEE International Symposium on Multiple-Valued Logic, 2010

Enhancing debugging of multiple missing control errors in reversible logic.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

RobuCheck: A Robustness Checker for Digital Circuits.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

A better-than-worst-case robustness measure.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009
Robustness Check for Multiple Faults Using Formal Techniques.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

Debugging of Toffoli networks.
Proceedings of the Design, Automation and Test in Europe, 2009


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