Stefan Nikolic

Orcid: 0000-0002-6831-1740

Affiliations:
  • University of Novi Sad, Department of Mathematics and Informatics, Serbia
  • EPFL, Lausanne, Switzerland (PhD 2023)
  • University of Novi Sad, Faculty of Technical Sciences, Serbia (former)


According to our database1, Stefan Nikolic authored at least 13 papers between 2014 and 2024.

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Timeline

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Bibliography

2024
Exploring FPGA Switch-Blocks without Explicitly Listing Connectivity Patterns.
ACM Trans. Reconfigurable Technol. Syst., March, 2024

2023
IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Mitigating the Last-Mile Bottleneck: A Two-Step Approach For Faster Commercial FPGA Routing.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

Regularity Matters: Designing Practical FPGA Switch-Blocks.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

2022
Detailed Placement for Dedicated LUT-Level FPGA Interconnect.
ACM Trans. Reconfigurable Technol. Syst., 2022

2021
Turning PathFinder Upside-Down: Exploring FPGA Switch-Blocks by Negotiating Switch Presence.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Global Is the New Local: FPGA Architecture at 5nm and Beyond.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020
Timing-Driven Placement for FPGA Architectures with Dedicated Routing Paths.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Straight to the Point: Intra- and Intercluster LUT Connections to Mitigate the Delay of Programmable Routing.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019
Finding a Needle in the Haystack of Hardened Interconnect Patterns.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

On Feasibility of FPGAs Without Dedicated Programmable Interconnect Structure.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2014
Building an Ensemble from a Single Naive Bayes Classifier in the Analysis of Key Risk Factors for Polish State Fire Service.
Proceedings of the 2014 Federated Conference on Computer Science and Information Systems, 2014


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