Stephen Nease

According to our database, Stephen Nease authored at least 13 papers between 2012 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

A Programmable and Configurable Mixed-Mode FPAA SoC.

Suma George, Sihwan Kim, Sahil Shah, Jennifer Hasler, Michelle Collins, Farhan Adil, Richard B. Wunderlich, Stephen Nease, Shubha Ramakrishnan

IEEE Trans. Very Large Scale Integr. Syst., 2016

Learning in Silicon Beyond STDP: A Neuromorphic Implementation of Multi-Factor Synaptic Plasticity With Calcium-Based Dynamics.

Frank L. Maldonado Huayaney, Stephen Nease, Elisabetta Chicca

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Floating-gate-based intrinsic plasticity with low-voltage rate control.

Stephen Nease, Elisabetta Chicca

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

SoC FPAA IC, PCB, and tool demonstration.

Sihwan Kim, Farhan Adil, Scott Koziol, Stephen Nease, Michelle Collins, Sahil Shah, Matt Kagle, Jennifer Hasler

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset.

Jennifer Hasler, Sihwan Kim, Sahil Shah, Farhan Adil, Michelle Collins, Scott Koziol, Stephen Nease

Proceedings of the 11th European Workshop on Microelectronics Education, 2016

2015

Power-efficient estimation of silicon neuron firing rates with floating-gate transistors.

Stephen Nease, Elisabetta Chicca

Proceedings of the European Conference on Circuit Theory and Design, 2015

Device mismatch in a neuromorphic system implements random features for regression.

Ole Richter, René Felix Reinhart, Stephen Nease, Jochen J. Steil, Elisabetta Chicca

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2013

A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena.

Stephen Brink, Stephen Nease, Paul E. Hasler, Shubha Ramakrishnan, Richard B. Wunderlich, Arindam Basu, Brian P. Degnan

IEEE Trans. Biomed. Circuits Syst., 2013

Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit.

Stephen Brink, Stephen Nease, Paul E. Hasler

Neural Networks, 2013

STDP-enabled learning on a reconfigurable neuromorphic platform.

Stephen Nease, Stephen Brink, Paul E. Hasler

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012

Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform.

Stephen Nease, Suma George, Paul E. Hasler, Scott Koziol, Stephen Brink

IEEE Trans. Biomed. Circuits Syst., 2012

A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing.

Craig Schlottmann, Samuel A. Shapero, Stephen Nease, Paul E. Hasler

IEEE J. Solid State Circuits, 2012

A mixed-mode FPAA SoC for analog-enhanced signal processing.

Craig Schlottmann, Stephen Nease, Samuel A. Shapero, Paul E. Hasler

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012