Jennifer Hasler

According to our database1, Jennifer Hasler authored at least 51 papers between 2013 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2020
Large-Scale Field-Programmable Analog Arrays.
Proc. IEEE, 2020

2019
A Real-Time Vital-Sign Monitoring in the Physical Domain on a Mixed-Signal Reconfigurable Platform.
IEEE Trans. Biomed. Circuits Syst., 2019

Implementation of Synapses with Hodgkin Huxley Neurons on the FPAA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Temperature Sensitivity and Compensation on a Reconfigurable Platform.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Hodgkin-Huxley Neuron and FPAA Dynamics.
IEEE Trans. Biomed. Circuits Syst., 2018

SoC FPAA Hardware Implementation of a VMM+WTA Embedded Learning Classifier.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

VMM + WTA Embedded Classifiers Learning Algorithm Implementable on SoC FPAA Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain.
CoRR, 2018

Dynamics of Hodgkin Huxley Neuron across chips implemented on a reconfigurable platform.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Enabling Embedded Learning and Classification implemented on SoC FPAA devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Circuit Implementations Teaching a Junior Level Circuits Course Utilizing the SoC FPAA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Analog Abstraction, Computation, and Numerical Analysis.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Embedded Classifiers for Energy-Constrained IoT Network Security.
Proceedings of the Cyber-Physical Systems Security., 2018

2017
Calibration of Floating-Gate SoC FPAA System.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Single-Objective Path Planning for Autonomous Robots Using Reconfigurable Analog VLSI.
IEEE Trans. Syst. Man Cybern. Syst., 2017

Tuning of Multiple Parameters With a BIST System.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

SoC FPAA immersed junior level circuits course.
Proceedings of the 2017 IEEE International Conference on Microelectronic Systems Education, 2017

Low power speech detector on a FPAA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Using SoC FPAA and integrated simulator for implementation of circuits and systems in education.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Floating-gate FPAA calibration for analog system design and built-in self test.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Proof-of-concept energy-efficient and real-time hemodynamic feature extraction from bioimpedance signals using a mixed-signal field programmable analog array.
Proceedings of the 2017 IEEE EMBS International Conference on Biomedical & Health Informatics, 2017

2016
Integrated Floating-Gate Programming Environment for System-Level ICs.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A Programmable and Configurable Mixed-Mode FPAA SoC.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Assessing Trends in Performance per Watt for Signal Processing Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Demonstration of a remote FPAA system for research and education.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A remote FPAA system for research and education.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

SoC FPAA IC, PCB, and tool demonstration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

On the temperature dependence of subthreshold currents in MOS electron inversion layers, revisited.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Live demonstration: FPAA Demonstration Controlled through Android-Based Device.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Opportunities in physical computing driven by analog realization.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

An approach to using RASP tools in analog systems education.
Proceedings of the 2016 IEEE Frontiers in Education Conference, 2016

Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset.
Proceedings of the 11th European Workshop on Microelectronics Education, 2016

Reconfigurable analog classifier for knee-joint rehabilitation.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

2015
FPAA/Memristor Hybrid Computing Infrastructure.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Low-power, serial interface for power-constrained devices.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

Analog systems education: An integrated toolset and FPAA SoC boards.
Proceedings of the 2015 IEEE International Conference on Microelectronics Systems Education, 2015

2014
High-Level Modeling of Analog Computational Elements for Signal Processing Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Vector-Matrix Multiply and Winner-Take-All as an Analog Classifier.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Speech Processing on a Reconfigurable Analog Platform.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A Neuromorphic Approach to Path Planning Using a Reconfigurable Neuron Array IC.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Optimal Sparse Approximation with Integrate and Fire Neurons.
Int. J. Neural Syst., 2014

Three dimensional robot path planning using a field programmable analog array.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Floating gate ISFET for therapeutic drug screening of breast cancer cells.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Analog signal processing on a FPAA/memristor hybrid circuit.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A closed-loop charge balancing FPAA circuit with sub-nano-amp DC error for electrical stimulation.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

2013
Neuron Array With Plastic Synapses and Programmable Dendrites.
IEEE Trans. Biomed. Circuits Syst., 2013

A large-scale FPAA enabling adaptive floating-gate circuits.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A compact programmable analog classifier using a VMM + WTA network.
Proceedings of the IEEE International Conference on Acoustics, 2013

Path planning using a neuron array integrated circuit.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Physics based computing enabling energy efficiency past moore's law.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013


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