Stephen Brink

According to our database1, Stephen Brink authored at least 17 papers between 2008 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
Speech Processing on a Reconfigurable Analog Platform.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A Neuromorphic Approach to Path Planning Using a Reconfigurable Neuron Array IC.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2013
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena.
IEEE Trans. Biomed. Circuits Syst., 2013

Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit.
Neural Networks, 2013

A large-scale FPAA enabling adaptive floating-gate circuits.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Path planning using a neuron array integrated circuit.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

STDP-enabled learning on a reconfigurable neuromorphic platform.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012
Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform.
IEEE Trans. Biomed. Circuits Syst., 2012

2010
Neural Dynamics in Reconfigurable Silicon.
IEEE Trans. Biomed. Circuits Syst., 2010

A Floating-Gate-Based Field-Programmable Analog Array.
IEEE J. Solid State Circuits, 2010

Hardware and software infrastructure for a family of floating-gate based FPAAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Large-scale Reconfigurable Smart Sensory Chip.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A learning digital computer.
Proceedings of the 46th Design Automation Conference, 2009

2008
A biophysically based dendrite model using programmable floating-gate devices.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

RASP 2.8: A new generation of floating-gate based field programmable analog array.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008


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