Scott Koziol

Orcid: 0000-0002-5510-294X

According to our database1, Scott Koziol authored at least 32 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Investigation of Patellar Deep Tendon Reflex Using Millimeter-Wave Radar and Motion Capture Technologies.
IEEE Access, 2024

2023
Cryptographically Secure PseudoRandom Bit Generator for Wearable Technology.
Entropy, July, 2023

Behavior Analysis of the Binary Hyperbolic Tangent (Btanh) Algorithm.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Sensor Fusion Image Processing for Autonomous Robot Blimps.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
Implementation and Feedback Control Tuning of an Analog Izhikevich Neuron Circuit.
IEEE Access, 2022

2021
Stochastic Computing with Simulated Event Camera Data.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2020
Robot Path Planning Using Analog Circuit Phase Delay.
IEEE Trans. Syst. Man Cybern. Syst., 2020

Achieving a quantum smart workforce.
CoRR, 2020

Multi-Objective Path Planning for Autonomous Robots Using Reconfigurable Analog VLSI.
IEEE Access, 2020

2018
Mobile Robot Rendezvous Using Potential Fields combined With Parallel Navigation.
IEEE Access, 2018

Mobile Robot Path Planning With a Moving Goal.
IEEE Access, 2018

2017
Single-Objective Path Planning for Autonomous Robots Using Reconfigurable Analog VLSI.
IEEE Trans. Syst. Man Cybern. Syst., 2017

Neuromorphic Computation Using Quantum-Dot Cellular Automata.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017

2016
SoC FPAA IC, PCB, and tool demonstration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset.
Proceedings of the 11th European Workshop on Microelectronics Education, 2016

2015
Path Planning for a Bistatic Sonar Receiver on an Autonomous Undersea Vehicle Tracking Multiple Targets.
Proceedings of the 10th International Conference on Underwater Networks & Systems, 2015

2014
A Neuromorphic Approach to Path Planning Using a Reconfigurable Neuron Array IC.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Efficient SIFT processing using sub-sampled convolution and masking techniques.
Proceedings of the 2014 IEEE International Conference on Systems, Man, and Cybernetics, 2014

Three dimensional robot path planning using a field programmable analog array.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013
Path planning using a neuron array integrated circuit.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

2012
Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform.
IEEE Trans. Biomed. Circuits Syst., 2012

Robot path planning using Field Programmable Analog Arrays.
Proceedings of the IEEE International Conference on Robotics and Automation, 2012

2011
Using floating-gate based programmable analog arrays for real-time control of a game-playing robot.
Proceedings of the IEEE International Conference on Systems, 2011

FPAA chips and tools as the center of an design-based analog systems education.
Proceedings of the 2011 IEEE International Conference on Microelectronic Systems Education, 2011

Reconfigurable Analog VLSI circuits for robot path planning.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011

2010
Neural Dynamics in Reconfigurable Silicon.
IEEE Trans. Biomed. Circuits Syst., 2010

A Floating-Gate-Based Field-Programmable Analog Array.
IEEE J. Solid State Circuits, 2010

Hardware and software infrastructure for a family of floating-gate based FPAAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2008
A biophysically based dendrite model using programmable floating-gate devices.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

RASP 2.8: A new generation of floating-gate based field programmable analog array.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Transistor Channel Dendrites implementing HMM classifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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