Steven S. Lumetta

  • University of Illinois, USA

According to our database1, Steven S. Lumetta authored at least 61 papers between 1993 and 2024.

Collaborative distances:



In proceedings 
PhD thesis 


Online presence:



PandoGen: Generating complete instances of future SARS-CoV-2 sequences using Deep Learning.
PLoS Comput. Biol., January, 2024

HELLO: improved neural network architectures and methodologies for small variant calling.
BMC Bioinform., 2021

End-to-End Automation of Feedback on Student Assembly Programs.
Proceedings of the 36th IEEE/ACM International Conference on Automated Software Engineering, 2021

ASAP: Accelerated Short-Read Alignment on Programmable Hardware.
IEEE Trans. Computers, 2019

A recurrent Markov state-space generative model for sequences.
Proceedings of the 22nd International Conference on Artificial Intelligence and Statistics, 2019

Loop path reduction by state pruning.
Proceedings of the 33rd ACM/IEEE International Conference on Automated Software Engineering, 2018

A ML-based Runtime System for Executing Dataflow Graphs on Heterogeneous Processors.
Proceedings of the ACM Symposium on Cloud Computing, 2018

Deep Learning for Better Variant Calling for Cancer Diagnosis and Treatment.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

On accelerating pair-HMM computations in programmable hardware.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Automated Feedback Framework for Introductory Programming Courses.
Proceedings of the 2016 ACM Conference on Innovation and Technology in Computer Science Education, 2016

Smartphone-based thin layer chromatography for the discrimination of falsified medicines.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016

Locality-centric thread scheduling for bulk-synchronous programming models on CPU architectures.
Proceedings of the 13th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2015

Hybrid latency tolerance for robust energy-efficiency on 1000-core data parallel processors.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

Opportunity cost analysis for dynamic wavelength routed mesh networks.
IEEE/ACM Trans. Netw., 2011

Cohesion: An Adaptive Hybrid Memory Model for Accelerators.
IEEE Micro, 2011

Rigel: A 1, 024-Core Single-Chip Accelerator Architecture.
IEEE Micro, 2011

MOPED: Accelerating Data Communication on Future CMPs.
IEEE Micro, 2011

MOPED: Orchestrating interprocess message data on CMPs.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

A Task-Centric Memory Model for Scalable Accelerator Architectures.
IEEE Micro, 2010

Dimensioning WDM Networks for Dynamic Routing of Evolving Traffic.
JOCN, 2010

Implementing a GPU Programming Model on a Non-GPU Accelerator Architecture.
Proceedings of the Computer Architecture, 2010

Cohesion: a hybrid memory model for accelerators.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

Accelerating data movement on future chip multi-processors.
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies, 2010

Heuristic Resource Optimization for Dynamic Wavelength Services on Optically Reconfigurable Networks.
Proceedings of the 19th International Conference on Computer Communications and Networks, 2010

WAYPOINT: scaling coherence to thousand-core architectures.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

CASES 2007 guest editors' introduction.
Des. Autom. Embed. Syst., 2009

Rigel: an architecture and scalable programming interface for a 1000-core accelerator.
Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

CUBA: an architecture for efficient CPU/co-processor data communication.
Proceedings of the 22nd Annual International Conference on Supercomputing, 2008

HybridOS: runtime support for reconfigurable accelerators.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

QoT-guaranteed protection: Survivability under physical layer impairments.
Proceedings of the 5th International ICST Conference on Broadband Communications, 2008

Rapid and Efficient Protection for All-Optical WDM Mesh Networks.
IEEE J. Sel. Areas Commun., 2007

Using the Power of Two Choices to Improve Bloom Filters.
Internet Math., 2007

Implicitly Parallel Programming Models for Thousand-Core Microprocessors.
Proceedings of the 44th Design Automation Conference, 2007

Reduced flow routing: Leveraging residual capacity to reduce blocking in GMPLS networks.
Proceedings of the Fourth International Conference on Broadband Communications, 2007

Resource dimensioning in WDM networks under state-based routing schemes.
Proceedings of the Fourth International Conference on Broadband Communications, 2007

CIGAR: Application Partitioning for a CPU/Coprocessor Architecture.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

A hybrid active queue management for stability and fast adaptation.
J. Commun. Networks, 2006

Signature Analyzer Design for Yield Learning Support.
Proceedings of the 2006 IEEE International Test Conference, 2006

X-Tolerant Test Response Compaction.
IEEE Des. Test Comput., 2005

Continuous Optimization.
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

X-Tolerant Signature Analysis.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Capacity-Efficient Protection with Fast Recovery in Optically Transparent Mesh Networks.
Proceedings of the 1st International Conference on Broadband Networks (BROADNETS 2004), 2004

Application of Saluja-Karpovsky Compactors to Test Responses with Many Unknowns.
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Characterization of essential dynamic instructions.
Proceedings of the International Conference on Measurements and Modeling of Computer Systems, 2003

Hybrid Active Queue Management.
Proceedings of the Eighth IEEE Symposium on Computers and Communications (ISCC 2003), 30 June, 2003

Dynamic Optimization of Micro-Operations.
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003

Improving Quasi-Dynamic Schedules through Region Slip.
Proceedings of the 1st IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2003), 2003

Generalized loop-back recovery in optical mesh networks.
IEEE/ACM Trans. Netw., 2002

A network management architecture for robust packet routing in mesh optical access networks.
IEEE J. Sel. Areas Commun., 2002

Instruction fetch deferral using static slack.
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

rePLay: A Hardware Framework for Dynamic Optimization.
IEEE Trans. Computers, 2001

Architectural issues for robust optical access.
IEEE Commun. Mag., 2001

Performance characterization of a hardware mechanism for dynamic optimization.
Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

Towards a Deeper Understanding of Link Restoration Algorithms for Mesh Networks.
Proceedings of the Proceedings IEEE INFOCOM 2001, 2001

Managing Concurrent Access for Shared Memory Active Messages.
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998

Multi Protocol Active Messages on a Cluster of SMP.
Proceedings of the ACM/IEEE Conference on Supercomputing, 1997

The Mantis parallel debugger.
Proceedings of the SIGMETRICS symposium on Parallel and distributed tools, 1996

Towards Modeling the Performance of a Fast Connected Components Algorithm on Parallel Machines.
Proceedings of the Proceedings Supercomputing '95, San Diego, CA, USA, December 4-8, 1995, 1995

Connected components on distributed memory machines.
Proceedings of the Parallel Algorithms, 1994

Decentralized optimal power pricing: the development of a parallel program.
IEEE Parallel Distributed Technol. Syst. Appl., 1993

Parallel programming in Split-C.
Proceedings of the Proceedings Supercomputing '93, 1993