Isaac Gelado

According to our database1, Isaac Gelado authored at least 27 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
CODAG: Characterizing and Optimizing Decompression Algorithms for GPUs.
CoRR, 2023

GPU-Initiated On-Demand High-Throughput Storage Access in the BaM System Architecture.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
BaM: A Case for Enabling Fine-grain High Throughput GPU-Orchestrated Access to Storage.
CoRR, 2022

2019
Throughput-oriented GPU memory allocation.
Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2019

Accelerating reduction and scan using tensor core units.
Proceedings of the ACM International Conference on Supercomputing, 2019

2017
Efficient exception handling support for GPUs.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

2015
Runtime and Architecture Support for Efficient Data Exchange in Multi-Accelerator Applications.
IEEE Trans. Parallel Distributed Syst., 2015

Optimized Data Transfers Based on the OpenCL Event Management Mechanism.
Sci. Program., 2015

GPU-SM: shared memory multi-GPU programming.
Proceedings of the 8th Workshop on General Purpose Processing using GPUs, 2015

Automatic Parallelization of Kernels in Shared-Memory Multi-GPU Nodes.
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015

2014
Enabling preemptive multiprogramming on GPUs.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

Energy Efficient HPC on Embedded SoCs: Optimization Techniques for Mali GPU.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Automatic execution of single-GPU computations across multiple GPUs.
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013
Supercomputing with commodity CPUs: are mobile SoCs ready for HPC?
Proceedings of the International Conference for High Performance Computing, 2013

Parallelizing general histogram application for CUDA architectures.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

clMPI: An OpenCL Extension for Interoperation with the Message Passing Interface.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Experiences with mobile processors for energy efficient HPC.
Proceedings of the Design, Automation and Test in Europe, 2013

Comparison based sorting for systems with multiple GPUs.
Proceedings of the 6th Workshop on General Purpose Processor Using Graphics Processing Units, 2013

2012
Efficient performance evaluation of memory hierarchy for highly multithreaded graphics processors.
Proceedings of the 17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2012

2011
Assessing Accelerator-Based HPC Reverse Time Migration.
IEEE Trans. Parallel Distributed Syst., 2011

2010
On the programmability of heterogeneous massively-parallel computing systems.
PhD thesis, 2010

An asymmetric distributed shared memory model for heterogeneous parallel systems.
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010

2009
High-Performance Reverse Time Migration on GPU.
Proceedings of the 2009 International Conference of the Chilean Computer Science Society, 2009

Predictive Runtime Code Scheduling for Heterogeneous Architectures.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

2008
CUBA: an architecture for efficient CPU/co-processor data communication.
Proceedings of the 22nd Annual International Conference on Supercomputing, 2008

2007
Implicitly Parallel Programming Models for Thousand-Core Microprocessors.
Proceedings of the 44th Design Automation Conference, 2007

CIGAR: Application Partitioning for a CPU/Coprocessor Architecture.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007


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