Subhashis Majumder

According to our database1, Subhashis Majumder authored at least 46 papers between 1998 and 2020.

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Bibliography

2020
Efficient meta-data structure in top-<i>k</i> queries of combinations and multi-item procurement auctions.
Theor. Comput. Sci., 2020

2019
Fast detection of community structures using graph traversal in social networks.
Knowl. Inf. Syst., 2019

Collaborative Recommendations using Hierarchical Clustering based on K-d Trees and Quadtrees.
Int. J. Uncertain. Fuzziness Knowl. Based Syst., 2019

A Deterministic Multi-layered Partitioning Tool for Wire-Length Reduction of Monolithic 3D-IC.
Proceedings of the 26th IEEE International Conference on High Performance Computing, 2019

Scalable Recommendations Using Clustering Based Collaborative Filtering.
Proceedings of the 2019 International Conference on Information Technology (ICIT), 2019

Tag-Cloud Based Recommendation for Movies.
Proceedings of the Computer Information Systems and Industrial Management, 2019

End-User Position-Driven Small Base Station Placement for Indoor Communication.
Proceedings of the Advanced Computing and Systems for Security, 2019

2018
Distributed heuristic adaptive power control algorithms in femto cellular networks for improved performance.
Trans. Emerg. Telecommun. Technol., 2018

Test-Time Reduction for Power-Aware 3D-SoC.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017
The Habits of Highly Effective Researchers: An Empirical Study.
IEEE Trans. Big Data, 2017

On Finding the Maximum and Minimum Density Axes-parallel Regions in IR<sup>d</sup>.
Fundam. Informaticae, 2017

A placement optimization technique for 3D IC.
Proceedings of the 7th International Symposium on Embedded Computing and System Design, 2017

2016
A linear time algorithm for optimal k-hop dominating set of a tree.
Inf. Process. Lett., 2016

Simulation-based method for optimum microfluidic sample dilution using weighted mix-split of droplets.
IET Comput. Digit. Tech., 2016

Efficient Generation of Top-k Procurements in a Multi-item Auction.
Proceedings of the WALCOM: Algorithms and Computation - 10th International Workshop, 2016

Power-aware test optimization for core-based 3D-SOCs under TSV-constraints.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

A heuristic approach towards minimizing resource allocation for femto base station deployment.
Proceedings of the European Conference on Networks and Communications, 2016

Detecting Community Structures in Social Networks by Graph Sparsification.
Proceedings of the 3rd IKDD Conference on Data Science, 2016

2015
Spanning tree-based fast community detection methods in social networks.
Innov. Syst. Softw. Eng., 2015

Unified scheme for finding disjoint and overlapping communities in social networks using strength of ties.
Int. J. Soc. Netw. Min., 2015

Partitioning-based test time reduction for core-based 3DICs.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

Iterative Use of Weighted Voronoi Diagrams to Improve Scalability in Recommender Systems.
Proceedings of the Advances in Knowledge Discovery and Data Mining, 2015

2014
How Many Eyeballs Does a Bug Need? An Empirical Validation of Linus' Law.
Proceedings of the Agile Processes in Software Engineering and Extreme Programming, 2014

A thermal aware 3D IC partitioning technique.
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

Developer involvement considered harmful?: an empirical examination of Android bug resolution times.
Proceedings of the 6th International Workshop on Social Software Engineering, 2014

A Graph-Based 3D IC Partitioning Technique.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Analysis of Concentration Errors in Sample Dilution Algorithms on a Digital Microfluidic Biochip.
Proceedings of the Applied Algorithms - First International Conference, 2014

Finding Influential Nodes in Social Networks Using Minimum k-Hop Dominating Set.
Proceedings of the Applied Algorithms - First International Conference, 2014

Top - K Query Retrieval of Combinations with Sum-of-Subsets Ranking.
Proceedings of the Combinatorial Optimization and Applications, 2014

2013
Colored top-K range-aggregate queries.
Inf. Process. Lett., 2013

2012
Spread of Information in a Social Network Using Influential Nodes.
Proceedings of the Advances in Knowledge Discovery and Data Mining, 2012

2010
Separating Multi-Color Points on a Plane with Fewest Axis-Parallel Lines.
Fundam. Informaticae, 2010

2008
On the density and discrepancy of a 2D point set with applications to thermal analysis of VLSI chips.
Inf. Process. Lett., 2008

Cognitive Distributed Networks in Environmental e-Science.
Proceedings of the 12th IEEE International Workshop on Future Trends of Distributed Computing Systems, 2008

2007
Hierarchical partitioning of VLSI floorplans by staircases.
ACM Trans. Design Autom. Electr. Syst., 2007

2006
Solving Thermal Problems of Hot Chips Using Voronoi Diagrams.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005
Hot Spots and Zones in a Chip: A Geometrician's View.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Density or Discrepancy: A VLSI Designer's Dilemma in Hot Spot Analysis.
Proceedings of the 17th Canadian Conference on Computational Geometry, 2005

2004
A New Classification of Path-Delay Fault Testability in Terms of Stuck-at Faults.
J. Comput. Sci. Technol., 2004

On Finding A Staircase Channel With Minimum Crossing Nets In A VLSI Floorplan.
J. Circuits Syst. Comput., 2004

2001
Area(number)-balanced hierarchy of staircase channels with minimum crossing nets.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
Topological Routing Amidst Polygonal Obstacles.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

1999
A Complete Characterization of Path Delay Faults through Stuck-at Faults.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1998
On Delay-Untestable Paths and Stuck-Fault Redundancy.
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

Partitioning VLSI Floorplans by Staircase Channels for Global Routing.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

Path Delay Testing: Variable-Clock Versus Rated-Clock.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998


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