Susumu Takeda

According to our database, Susumu Takeda authored at least 5 papers between 2014 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

Circuit And Systems Based on Advanced MRAM for Near Future Computing Applications.

Shinobu Fujita, Satoshi Takaya, Susumu Takeda, Kazutaka Ikegami

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2017

Novel memory hierarchy with e-STT-MRAM for near-future applications.

Shinobu Fujita, Hiroki Noguchi, Kazutaka Ikegami, Susumu Takeda, Kumiko Nomura, Keiko Abe

Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017

2015

Immediate sleep: Reducing energy impact of peripheral circuits in STT-MRAM caches.

Eishi Arima, Hiroki Noguchi, Takashi Nakada, Shinobu Miwa, Susumu Takeda, Shinobu Fujita, Hiroshi Nakamura

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2014

Novel STT-MRAM-based last level caches for high performance processors using normally-off architectures.

Shinobu Fujita, Hiroki Noguchi, Kazutaka Ikegami, Susumu Takeda, Kumiko Nomura, Keiko Abe

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Novel nonvolatile memory hierarchies to realize "normally-off mobile processors".

Shinobu Fujita, Kumiko Nomura, Hiroki Noguchi, Susumu Takeda, Keiko Abe

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014