T. R. Viswanathan

According to our database1, T. R. Viswanathan authored at least 14 papers between 1993 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
Level-Crossing Detection based Low-Power Sigma-Delta ADC for Sensor Applications.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2014
Analog signal processing in deep submicron CMOS technologies using inverters.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A 1.1mW, 63.7dB-SNDR, 10MHz-BW hybrid voltage -time domain ADC.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A hybrid SAR-VCO ΔΣ ADC with first-order noise shaping.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
Harmonic Rejection Mixing Techniques Using Clock-Gating.
IEEE J. Solid State Circuits, 2013

Operational current to frequency converter.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012
Clock-gated harmonic rejection mixers.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

An uncalibrated 2MHz, 6mW, 63.5dB SNDR discrete-time input VCO-based ΔΣ ADC.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
A Two-Stage ADC Architecture With VCO-Based Second Stage.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

2010
A Discrete-Time Input Delta Sigma ADC Architecture Using a Dual-VCO-Based Integrator.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

2009
Self-Biased Unity-Gain Buffers With Low Gain Error.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

2007
A 1.4 V Supply CMOS Fractional Bandgap Reference.
IEEE J. Solid State Circuits, 2007

2006
A Unity-Gain Buffer with Reduced Offset and Gain Error.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

1993
A Non-uniform Sampling Technique for A/D Conversion.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


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